summaryrefslogtreecommitdiff
path: root/src/soc/intel/skylake
diff options
context:
space:
mode:
authorMichael Niewöhner <foss@mniewoehner.de>2019-11-02 12:14:06 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-11-11 10:26:11 +0000
commit93d215cb05a05464fef14f26f638341da2ce3d59 (patch)
tree9e33a2efb7e6c5a0cb6e90d9f186e73074718b28 /src/soc/intel/skylake
parentb4d960b65aa126d4534189672322ec62dcd87bde (diff)
soc/intel/cannonlake: add soc implementation for ETR address API
Add soc implementation for the new ETR address API. Change-Id: Ifc128099185a2c40ec3e7c5f84fcc42227c93f28 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36567 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake')
0 files changed, 0 insertions, 0 deletions