cpu/x86/smm: Drop SMI handler address from struct

Change-Id: Ib925b11ba269e0f3a9a0a7550705bf2a6794c5b1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34747
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

2 files changed, 2 insertions, 5 deletions

diff --git a/src/soc/intel/skylake/include/soc/smm.h b/src/soc/intel/skylake/include/soc/smm.h
index b2debe869e..9c15db2915 100644
--- a/src/soc/intel/skylake/include/soc/smm.h
+++ b/src/soc/intel/skylake/include/soc/smm.h
@@ -30,8 +30,6 @@ struct ied_header {
 } __packed;
 
 struct smm_relocation_params {
-	uintptr_t smram_base;
-	size_t smram_size;
 	uintptr_t ied_base;
 	size_t ied_size;
 	msr_t smrr_base;
diff --git a/src/soc/intel/skylake/smmrelocate.c b/src/soc/intel/skylake/smmrelocate.c
index 42d15b79d5..9bc599a3cd 100644
--- a/src/soc/intel/skylake/smmrelocate.c
+++ b/src/soc/intel/skylake/smmrelocate.c
@@ -197,7 +197,6 @@ static void fill_in_relocation_params(struct smm_relocation_params *params)
 	phys_bits = cpuid_eax(0x80000008) & 0xff;
 
 	smm_region(&tseg_base, &tseg_size);
-	smm_subregion(SMM_SUBREGION_HANDLER, &params->smram_base, &params->smram_size);
 	smm_subregion(SMM_SUBREGION_CHIPSET, &params->ied_base, &params->ied_size);
 
 	/* SMRR has 32-bits of valid address aligned to 4KiB. */
@@ -257,11 +256,11 @@ void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
 
 	fill_in_relocation_params(&smm_reloc_params);
 
+	smm_subregion(SMM_SUBREGION_HANDLER, perm_smbase, perm_smsize);
+
 	if (smm_reloc_params.ied_size)
 		setup_ied_area(&smm_reloc_params);
 
-	*perm_smbase = smm_reloc_params.smram_base;
-	*perm_smsize = smm_reloc_params.smram_size;
 	*smm_save_state_size = sizeof(em64t101_smm_state_save_area_t);
 }