soc/intel: Use config_of()

Change-Id: I0727a6b327410197cf32f598d1312737744386b3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34328
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: David Guckian

12 files changed, 23 insertions, 31 deletions

diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c
index 7fbe9e519c..a7d58720a5 100644
--- a/src/soc/intel/skylake/chip.c
+++ b/src/soc/intel/skylake/chip.c
@@ -93,7 +93,7 @@ struct chip_operations soc_intel_skylake_ops = {
 void soc_silicon_init_params(SILICON_INIT_UPD *params)
 {
 	struct device *dev = pcidev_path_on_root(PCH_DEVFN_LPC);
-	const struct soc_intel_skylake_config *config = dev->chip_info;
+	const struct soc_intel_skylake_config *config = config_of(dev);
 	int i;
 
 	memcpy(params->SerialIoDevMode, config->SerialIoDevMode,
diff --git a/src/soc/intel/skylake/finalize.c b/src/soc/intel/skylake/finalize.c
index 34738f28f1..3c137c5871 100644
--- a/src/soc/intel/skylake/finalize.c
+++ b/src/soc/intel/skylake/finalize.c
@@ -76,7 +76,7 @@ static void pch_finalize_script(struct device *dev)
 	intel_me_status();
 
 	pmcbase = pmc_mmio_regs();
-	config = dev->chip_info;
+	config = config_of(dev);
 
 	/*
 	 * Set low maximum temp value used for dynamic thermal sensor
@@ -117,7 +117,7 @@ static void soc_lockdown(struct device *dev)
 	struct soc_intel_skylake_config *config;
 	u8 reg8;
 
-	config = dev->chip_info;
+	config = config_of(dev);
 
 	/* Global SMI Lock */
 	if (config->LockDownConfigGlobalSmi == 0) {
@@ -134,7 +134,7 @@ static void soc_finalize(void *unused)
 	dev = PCH_DEV_PMC;
 
 	/* Check if PMC is enabled, else return */
-	if (dev == NULL || dev->chip_info == NULL)
+	if (dev == NULL)
 		return;
 
 	printk(BIOS_DEBUG, "Finalizing chipset.\n");
diff --git a/src/soc/intel/skylake/graphics.c b/src/soc/intel/skylake/graphics.c
index 7efc65a591..c06893edf6 100644
--- a/src/soc/intel/skylake/graphics.c
+++ b/src/soc/intel/skylake/graphics.c
@@ -36,7 +36,7 @@ uintptr_t fsp_soc_get_igd_bar(void)
 
 static void graphics_setup_panel(struct device *dev)
 {
-	struct soc_intel_skylake_config *conf = dev->chip_info;
+	struct soc_intel_skylake_config *conf = config_of(dev);
 	struct resource *mmio_res;
 	uint8_t *base;
 	u32 reg32;
diff --git a/src/soc/intel/skylake/irq.c b/src/soc/intel/skylake/irq.c
index 03cdb071ce..ddaffda796 100644
--- a/src/soc/intel/skylake/irq.c
+++ b/src/soc/intel/skylake/irq.c
@@ -224,7 +224,7 @@ void soc_irq_settings(FSP_SIL_UPD *params)
 	uint32_t i, intdeventry;
 	u8 irq_config[PCH_MAX_IRQ_CONFIG];
 	const struct device *dev = pcidev_path_on_root(PCH_DEVFN_LPC);
-	const struct soc_intel_skylake_config *config = dev->chip_info;
+	const struct soc_intel_skylake_config *config = config_of(dev);
 
 	/* Get Device Int Count */
 	intdeventry = ARRAY_SIZE(devintconfig);
@@ -295,7 +295,7 @@ void soc_irq_settings(FSP_SIL_UPD *params)
 
 void soc_pch_pirq_init(const struct device *dev)
 {
-	const config_t *config = dev->chip_info;
+	const config_t *config = config_of(dev);
 	uint8_t pch_interrupt_routing[MAX_PXRC_CONFIG];
 	struct device *irq_dev;
 
diff --git a/src/soc/intel/skylake/lpc.c b/src/soc/intel/skylake/lpc.c
index d8e5ccc6c0..71ffb9a23f 100644
--- a/src/soc/intel/skylake/lpc.c
+++ b/src/soc/intel/skylake/lpc.c
@@ -69,7 +69,7 @@ static void pch_enable_ioapic(struct device *dev)
 
 void soc_get_gen_io_dec_range(const struct device *dev, uint32_t *gen_io_dec)
 {
-	const config_t *config = dev->chip_info;
+	const config_t *config = config_of(dev);
 
 	gen_io_dec[0] = config->gen1_dec;
 	gen_io_dec[1] = config->gen2_dec;
@@ -98,7 +98,7 @@ static const struct reg_script pch_misc_init_script[] = {
 
 void lpc_soc_init(struct device *dev)
 {
-	const config_t *const config = dev->chip_info;
+	const config_t *const config = config_of(dev);
 
 	/* Legacy initialization */
 	isa_dma_init();
diff --git a/src/soc/intel/skylake/memmap.c b/src/soc/intel/skylake/memmap.c
index ff7edbc95a..1058300197 100644
--- a/src/soc/intel/skylake/memmap.c
+++ b/src/soc/intel/skylake/memmap.c
@@ -207,7 +207,7 @@ static size_t calculate_reserved_mem_size(uintptr_t dram_base)
 	size_t reserve_mem_size;
 	const struct soc_intel_skylake_config *config;
 
-	config = dev->chip_info;
+	config = config_of(dev);
 
 	/* Get PRMRR size */
 	reserve_mem_base -= get_prmrr_size(reserve_mem_base, config);
diff --git a/src/soc/intel/skylake/pmutil.c b/src/soc/intel/skylake/pmutil.c
index 9732aa1617..90f1b038e0 100644
--- a/src/soc/intel/skylake/pmutil.c
+++ b/src/soc/intel/skylake/pmutil.c
@@ -177,13 +177,7 @@ void soc_get_gpi_gpe_configs(uint8_t *dw0, uint8_t *dw1, uint8_t *dw2)
 {
 	DEVTREE_CONST struct soc_intel_skylake_config *config;
 
-	/* Look up the device in devicetree */
-	DEVTREE_CONST struct device *dev = pcidev_path_on_root(PCH_DEVFN_PMC);
-	if (!dev || !dev->chip_info) {
-		printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n");
-		return;
-	}
-	config = dev->chip_info;
+	config = config_of_path(PCH_DEVFN_PMC);
 
 	/* Assign to out variable */
 	*dw0 = config->gpe0_dw0;
diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c
index 2bbab475af..2d0de2f5e9 100644
--- a/src/soc/intel/skylake/romstage/romstage.c
+++ b/src/soc/intel/skylake/romstage/romstage.c
@@ -39,26 +39,26 @@
 /* SOC initialization before RAM is enabled */
 void soc_pre_ram_init(struct romstage_params *params)
 {
+	const struct soc_intel_skylake_config *config;
+
 	/* Program MCHBAR and DMIBAR */
 	systemagent_early_init();
 
-	const struct device *const dev = pcidev_path_on_root(PCH_DEVFN_LPC);
-	const struct soc_intel_skylake_config *const config =
-		dev ? dev->chip_info : NULL;
+	config = config_of_path(PCH_DEVFN_LPC);
+
 	/* Force a full memory train if RMT is enabled */
-	params->disable_saved_data = config && config->Rmt;
+	params->disable_saved_data = config->Rmt;
 }
 
 /* UPD parameters to be initialized before MemoryInit */
 void soc_memory_init_params(struct romstage_params *params,
 			    MEMORY_INIT_UPD *upd)
 {
-	const struct device *dev;
 	const struct soc_intel_skylake_config *config;
 
 	/* Set the parameters for MemoryInit */
-	dev = pcidev_on_root(PCH_DEV_SLOT_LPC, 0);
-	config = dev->chip_info;
+
+	config = config_of_path(PCH_DEVFN_LPC);
 
 	/*
 	 * Set IGD stolen size to 64MB.  The FBC hardware for skylake does not
diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c
index 6884a324a8..b15fa89292 100644
--- a/src/soc/intel/skylake/romstage/romstage_fsp20.c
+++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c
@@ -326,13 +326,11 @@ static void soc_primary_gfx_config_params(FSP_M_CONFIG *m_cfg,
 
 void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
 {
-	const struct device *dev;
 	const struct soc_intel_skylake_config *config;
 	FSP_M_CONFIG *m_cfg = &mupd->FspmConfig;
 	FSP_M_TEST_CONFIG *m_t_cfg = &mupd->FspmTestConfig;
 
-	dev = pcidev_on_root(PCH_DEV_SLOT_LPC, 0);
-	config = dev->chip_info;
+	config = config_of_path(PCH_DEVFN_LPC);
 
 	soc_memory_init_params(m_cfg, config);
 	soc_peg_init_params(m_cfg, m_t_cfg, config);
diff --git a/src/soc/intel/skylake/sd.c b/src/soc/intel/skylake/sd.c
index 571d3e7b44..a24d03f98d 100644
--- a/src/soc/intel/skylake/sd.c
+++ b/src/soc/intel/skylake/sd.c
@@ -18,7 +18,7 @@
 
 int sd_fill_soc_gpio_info(struct acpi_gpio* gpio, struct device *dev)
 {
-	config_t *config = dev->chip_info;
+	config_t *config = config_of(dev);
 
 	/* Nothing to write if GPIO is not set in devicetree */
 	if(!config->sdcard_cd_gpio_default && !config->sdcard_cd_gpio.pins[0])
diff --git a/src/soc/intel/skylake/systemagent.c b/src/soc/intel/skylake/systemagent.c
index bfaadfd3a9..ea5526264b 100644
--- a/src/soc/intel/skylake/systemagent.c
+++ b/src/soc/intel/skylake/systemagent.c
@@ -52,12 +52,12 @@ void soc_add_fixed_mmio_resources(struct device *dev, int *index)
 		{ GDXCBAR, GDXC_BASE_ADDRESS, GDXC_BASE_SIZE, "GDXCBAR" },
 		{ EDRAMBAR, EDRAM_BASE_ADDRESS, EDRAM_BASE_SIZE, "EDRAMBAR" },
 	};
-	const struct soc_intel_skylake_config *const config = dev->chip_info;
+	const struct soc_intel_skylake_config *const config = config_of(dev);
 
 	sa_add_fixed_mmio_resources(dev, index, soc_fixed_resources,
 			ARRAY_SIZE(soc_fixed_resources));
 
-	if (!(config && config->ignore_vtd) && soc_is_vtd_capable()) {
+	if (!config->ignore_vtd && soc_is_vtd_capable()) {
 		if (igd_dev && igd_dev->enabled)
 			sa_add_fixed_mmio_resources(dev, index,
 					&soc_gfxvt_mmio_descriptor, 1);
diff --git a/src/soc/intel/skylake/thermal.c b/src/soc/intel/skylake/thermal.c
index 936543c7bf..006f3ae5cd 100644
--- a/src/soc/intel/skylake/thermal.c
+++ b/src/soc/intel/skylake/thermal.c
@@ -66,7 +66,7 @@ static uint16_t pch_get_ltt_value(struct device *dev)
 	uint16_t ltt_value;
 	uint16_t trip_temp = DEFAULT_TRIP_TEMP;
 
-	config = dev->chip_info;
+	config = config_of(dev);
 
 	if (config->pch_trip_temp)
 		trip_temp = config->pch_trip_temp;