diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-05 15:10:18 +0300 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-08 04:53:18 +0000 |
commit | 14222d86785d89415c014dab294205fd186b7084 (patch) | |
tree | 8760046ac6e86fc86b3d570a2e7281dc6e42fafd /src/soc/intel/skylake | |
parent | 9970b61ad3049d87650cd7b4eb5f47d667098186 (diff) |
arch/x86: Change smm_subregion() prototype
Do this to avoid some amount of explicit typecasting
that would be required otherwise.
Change-Id: I5bc2c3c1dd579f7c6c3d3354c0691e4ba3c778e1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34706
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/skylake')
-rw-r--r-- | src/soc/intel/skylake/include/soc/smm.h | 8 | ||||
-rw-r--r-- | src/soc/intel/skylake/memmap.c | 14 | ||||
-rw-r--r-- | src/soc/intel/skylake/romstage/romstage_fsp20.c | 6 | ||||
-rw-r--r-- | src/soc/intel/skylake/smmrelocate.c | 20 |
4 files changed, 17 insertions, 31 deletions
diff --git a/src/soc/intel/skylake/include/soc/smm.h b/src/soc/intel/skylake/include/soc/smm.h index 1000ce830c..b2debe869e 100644 --- a/src/soc/intel/skylake/include/soc/smm.h +++ b/src/soc/intel/skylake/include/soc/smm.h @@ -30,10 +30,10 @@ struct ied_header { } __packed; struct smm_relocation_params { - u32 smram_base; - u32 smram_size; - u32 ied_base; - u32 ied_size; + uintptr_t smram_base; + size_t smram_size; + uintptr_t ied_base; + size_t ied_size; msr_t smrr_base; msr_t smrr_mask; msr_t emrr_base; diff --git a/src/soc/intel/skylake/memmap.c b/src/soc/intel/skylake/memmap.c index f69a88b30f..d6ab908c37 100644 --- a/src/soc/intel/skylake/memmap.c +++ b/src/soc/intel/skylake/memmap.c @@ -25,14 +25,15 @@ #include <intelblocks/systemagent.h> #include <soc/msr.h> #include <soc/pci_devs.h> +#include <soc/smm.h> #include <soc/systemagent.h> #include <stdlib.h> #include "chip.h" -void smm_region(void **start, size_t *size) +void smm_region(uintptr_t *start, size_t *size) { - *start = (void *)sa_get_tseg_base(); + *start = sa_get_tseg_base(); *size = sa_get_tseg_size(); } @@ -47,16 +48,14 @@ void smm_region(void **start, size_t *size) * | (TSEG) | * +-------------------------+ TSEG */ -int smm_subregion(int sub, void **start, size_t *size) +int smm_subregion(int sub, uintptr_t *start, size_t *size) { uintptr_t sub_base; size_t sub_size; - void *smm_base; const size_t ied_size = CONFIG_IED_REGION_SIZE; const size_t cache_size = CONFIG_SMM_RESERVED_SIZE; - smm_region(&smm_base, &sub_size); - sub_base = (uintptr_t)smm_base; + smm_region(&sub_base, &sub_size); switch (sub) { case SMM_SUBREGION_HANDLER: @@ -78,9 +77,8 @@ int smm_subregion(int sub, void **start, size_t *size) return -1; } - *start = (void *)sub_base; + *start = sub_base; *size = sub_size; - return 0; } diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c index b3781e2a65..221c6c41d5 100644 --- a/src/soc/intel/skylake/romstage/romstage_fsp20.c +++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c @@ -173,9 +173,8 @@ asmlinkage void car_stage_entry(void) postcar_frame_add_mtrr(&pcf, top_of_ram, 16*MiB, MTRR_TYPE_WRBACK); if (CONFIG(HAVE_SMI_HANDLER)) { - void *smm_base; + uintptr_t smm_base; size_t smm_size; - uintptr_t tseg_base; /* * Cache the TSEG region at the top of ram. This region is @@ -185,8 +184,7 @@ asmlinkage void car_stage_entry(void) * region for other purposes. */ smm_region(&smm_base, &smm_size); - tseg_base = (uintptr_t)smm_base; - postcar_frame_add_mtrr(&pcf, tseg_base, smm_size, + postcar_frame_add_mtrr(&pcf, smm_base, smm_size, MTRR_TYPE_WRBACK); } diff --git a/src/soc/intel/skylake/smmrelocate.c b/src/soc/intel/skylake/smmrelocate.c index 6e2cf98ae2..b69692f4ce 100644 --- a/src/soc/intel/skylake/smmrelocate.c +++ b/src/soc/intel/skylake/smmrelocate.c @@ -182,11 +182,7 @@ void smm_relocation_handler(int cpu, uintptr_t curr_smbase, static void fill_in_relocation_params(struct smm_relocation_params *params) { - void *handler_base; - size_t handler_size; - void *ied_base; - size_t ied_size; - void *tseg_base; + uintptr_t tseg_base; size_t tseg_size; u32 emrr_base; u32 emrr_size; @@ -201,14 +197,8 @@ static void fill_in_relocation_params(struct smm_relocation_params *params) phys_bits = cpuid_eax(0x80000008) & 0xff; smm_region(&tseg_base, &tseg_size); - smm_subregion(SMM_SUBREGION_HANDLER, &handler_base, &handler_size); - smm_subregion(SMM_SUBREGION_CHIPSET, &ied_base, &ied_size); - - params->smram_size = handler_size; - params->smram_base = (uintptr_t)handler_base; - - params->ied_base = (uintptr_t)ied_base; - params->ied_size = ied_size; + smm_subregion(SMM_SUBREGION_HANDLER, ¶ms->smram_base, ¶ms->smram_size); + smm_subregion(SMM_SUBREGION_CHIPSET, ¶ms->ied_base, ¶ms->ied_size); /* SMRR has 32-bits of valid address aligned to 4KiB. */ params->smrr_base.lo = (params->smram_base & rmask) | MTRR_TYPE_WRBACK; @@ -251,8 +241,8 @@ static void setup_ied_area(struct smm_relocation_params *params) ied_base = (void *)params->ied_base; - printk(BIOS_DEBUG, "IED base = 0x%08x\n", params->ied_base); - printk(BIOS_DEBUG, "IED size = 0x%08x\n", params->ied_size); + printk(BIOS_DEBUG, "IED base = 0x%08x\n", (u32) params->ied_base); + printk(BIOS_DEBUG, "IED size = 0x%08x\n", (u32) params->ied_size); /* Place IED header at IEDBASE. */ memcpy(ied_base, &ied, sizeof(ied)); |