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authorSubrata Banik <subrata.banik@intel.com>2019-02-25 21:11:40 +0530
committerSubrata Banik <subrata.banik@intel.com>2019-02-28 02:21:44 +0000
commite87bdbba29e200847fd2f01b158298fe65646692 (patch)
treeaeb9fd31438a4e0645b56d3152cd8739f98c84af /src/soc/intel/skylake
parent3361120bc879c218a5107d2ff59255af0b07c97e (diff)
soc/intel/skylake: Remove redundant PM emulation timer macros
This patch removes duplicate pm timer emulation macros from soc directory and makes use from common code msr.h Change-Id: I6ec347e7464f785862e855817ec8308e3d207bb1 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/31610 Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake')
-rw-r--r--src/soc/intel/skylake/include/soc/msr.h4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/soc/intel/skylake/include/soc/msr.h b/src/soc/intel/skylake/include/soc/msr.h
index 6da9325d87..bd0942ae31 100644
--- a/src/soc/intel/skylake/include/soc/msr.h
+++ b/src/soc/intel/skylake/include/soc/msr.h
@@ -20,10 +20,6 @@
#include <intelblocks/msr.h>
#define MSR_PIC_MSG_CONTROL 0x2e
-#define MSR_EMULATE_PM_TIMER 0x121
-#define EMULATE_PM_TMR_EN (1 << 16)
-#define EMULATE_DELAY_OFFSET_VALUE 20
-#define EMULATE_DELAY_VALUE 0x13
#define MSR_LT_LOCK_MEMORY 0x2e7
#define MSR_UNCORE_PRMRR_PHYS_BASE 0x2f4
#define MSR_UNCORE_PRMRR_PHYS_MASK 0x2f5