diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2018-04-21 14:45:32 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2018-04-24 14:37:59 +0000 |
| commit | 6403167d290da235a732bd2d6157aa2124fb403a (patch) | |
| tree | 9c4805af37a31830934f91098d299e967df930c6 /src/soc/intel/skylake | |
| parent | 38fd6685e9da61daadc96a8d537e6966dfe3b219 (diff) | |
compiler.h: add __weak macro
Instead of writing out '__attribute__((weak))' use a shorter form.
Change-Id: If418a1d55052780077febd2d8f2089021f414b91
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/25767
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake')
| -rw-r--r-- | src/soc/intel/skylake/acpi.c | 3 | ||||
| -rw-r--r-- | src/soc/intel/skylake/chip_fsp20.c | 3 | ||||
| -rw-r--r-- | src/soc/intel/skylake/romstage/romstage_fsp20.c | 3 |
3 files changed, 6 insertions, 3 deletions
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c index 3d133f9266..914b9d51a3 100644 --- a/src/soc/intel/skylake/acpi.c +++ b/src/soc/intel/skylake/acpi.c @@ -23,6 +23,7 @@ #include <arch/smp/mpspec.h> #include <cbmem.h> #include <chip.h> +#include <compiler.h> #include <console/console.h> #include <cpu/cpu.h> #include <cpu/x86/smm.h> @@ -707,7 +708,7 @@ int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0) return GPE0_REG_MAX; } -__attribute__((weak)) void acpi_mainboard_gnvs(global_nvs_t *gnvs) +__weak void acpi_mainboard_gnvs(global_nvs_t *gnvs) { } diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index 054ed089dc..6e9181677e 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -20,6 +20,7 @@ #include <fsp/api.h> #include <arch/acpi.h> #include <chip.h> +#include <compiler.h> #include <bootstate.h> #include <console/console.h> #include <device/device.h> @@ -346,7 +347,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) } /* Mainboard GPIO Configuration */ -__attribute__((weak)) void mainboard_silicon_init_params(FSP_S_CONFIG *params) +__weak void mainboard_silicon_init_params(FSP_S_CONFIG *params) { printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__); } diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c index 0b2d276a73..760dcc1e8c 100644 --- a/src/soc/intel/skylake/romstage/romstage_fsp20.c +++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c @@ -18,6 +18,7 @@ #include <arch/io.h> #include <arch/symbols.h> #include <assert.h> +#include <compiler.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/msr.h> #include <cbmem.h> @@ -295,7 +296,7 @@ void soc_update_memory_params_for_mma(FSP_M_CONFIG *memory_cfg, memory_cfg->SaGv = 0x02; } -__attribute__((weak)) void mainboard_memory_init_params(FSPM_UPD *mupd) +__weak void mainboard_memory_init_params(FSPM_UPD *mupd) { /* Do nothing */ } |