diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-07-08 12:40:45 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-07-09 09:31:10 +0000 |
| commit | 39303d5d4960814fc606cce3a9ec10545faaef4b (patch) | |
| tree | 23e5acc814298022ac1c3314ceaae532d6303901 /src/soc/intel/skylake | |
| parent | fd051dc018346e5947d9d8733e269fc5020236ba (diff) | |
src/soc: Use "foo *bar" instead of "foo* bar"
Change-Id: I21680354f33916b7b4d913f51a842b5d6c2ecef3
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/27408
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/skylake')
| -rw-r--r-- | src/soc/intel/skylake/bootblock/report_platform.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/skylake/me.c | 16 |
2 files changed, 9 insertions, 9 deletions
diff --git a/src/soc/intel/skylake/bootblock/report_platform.c b/src/soc/intel/skylake/bootblock/report_platform.c index 8fd6599fb1..7d5bc3fb2a 100644 --- a/src/soc/intel/skylake/bootblock/report_platform.c +++ b/src/soc/intel/skylake/bootblock/report_platform.c @@ -121,7 +121,7 @@ static void report_cpu_info(void) char cpu_string[50], *cpu_name = cpu_string; /* 48 bytes are reported */ int vt, txt, aes; msr_t microcode_ver; - static const char * const mode[] = {"NOT ", ""}; + static const char *const mode[] = {"NOT ", ""}; const char *cpu_type = "Unknown"; index = 0x80000000; diff --git a/src/soc/intel/skylake/me.c b/src/soc/intel/skylake/me.c index a23172e60c..632749d071 100644 --- a/src/soc/intel/skylake/me.c +++ b/src/soc/intel/skylake/me.c @@ -34,7 +34,7 @@ static inline u32 me_read_config32(int offset) } /* HFSTS1[3:0] Current Working State Values */ -static const char * const me_cws_values[] = { +static const char *const me_cws_values[] = { [ME_HFS_CWS_RESET] = "Reset", [ME_HFS_CWS_INIT] = "Initializing", [ME_HFS_CWS_REC] = "Recovery", @@ -54,7 +54,7 @@ static const char * const me_cws_values[] = { }; /* HFSTS1[8:6] Current Operation State Values */ -static const char * const me_opstate_values[] = { +static const char *const me_opstate_values[] = { [ME_HFS_STATE_PREBOOT] = "Preboot", [ME_HFS_STATE_M0_UMA] = "M0 with UMA", [ME_HFS_STATE_M3] = "M3 without UMA", @@ -64,7 +64,7 @@ static const char * const me_opstate_values[] = { }; /* HFSTS1[19:16] Current Operation Mode Values */ -static const char * const me_opmode_values[] = { +static const char *const me_opmode_values[] = { [ME_HFS_MODE_NORMAL] = "Normal", [ME_HFS_MODE_DEBUG] = "Debug", [ME_HFS_MODE_DIS] = "Soft Temporary Disable", @@ -73,7 +73,7 @@ static const char * const me_opmode_values[] = { }; /* HFSTS1[15:12] Error Code Values */ -static const char * const me_error_values[] = { +static const char *const me_error_values[] = { [ME_HFS_ERROR_NONE] = "No Error", [ME_HFS_ERROR_UNCAT] = "Uncategorized Failure", [ME_HFS_ERROR_IMAGE] = "Image Failure", @@ -81,7 +81,7 @@ static const char * const me_error_values[] = { }; /* HFSTS2[31:28] ME Progress Code */ -static const char * const me_progress_values[] = { +static const char *const me_progress_values[] = { [ME_HFS2_PHASE_ROM] = "ROM Phase", [1] = "Unknown (1)", [ME_HFS2_PHASE_UKERNEL] = "uKernel Phase", @@ -94,7 +94,7 @@ static const char * const me_progress_values[] = { }; /* HFSTS2[27:24] Power Management Event */ -static const char * const me_pmevent_values[] = { +static const char *const me_pmevent_values[] = { [ME_HFS2_PMEVENT_CLEAN_MOFF_MX_WAKE] = "Clean Moff->Mx wake", [ME_HFS2_PMEVENT_MOFF_MX_WAKE_ERROR] = @@ -131,13 +131,13 @@ static const char * const me_pmevent_values[] = { }; /* Progress Code 0 states */ -static const char * const me_progress_rom_values[] = { +static const char *const me_progress_rom_values[] = { [ME_HFS2_STATE_ROM_BEGIN] = "BEGIN", [ME_HFS2_STATE_ROM_DISABLE] = "DISABLE" }; /* Progress Code 1 states */ -static const char * const me_progress_bup_values[] = { +static const char *const me_progress_bup_values[] = { [ME_HFS2_STATE_BUP_INIT] = "Initialization starts", [ME_HFS2_STATE_BUP_DIS_HOST_WAKE] = |