diff options
author | Furquan Shaikh <furquan@google.com> | 2021-01-06 20:30:35 -0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2021-01-11 07:41:22 +0000 |
commit | 4fa183fe79f5f7fc66750ee0bd2376f5c99ed9b0 (patch) | |
tree | 418460da0b63b06d9fe619dccb4b4601977b0a5d /src/soc/intel/skylake/uart.c | |
parent | b1fa231d76a5bb41a61a1c2907ab27e8ef9999bb (diff) |
soc/intel/uart: Drop SoC callback `soc_uart_console_to_device`
This change renames `struct uart_gpio_pad_config` to `struct
uart_controller_config` and adds a new parameter devfn (which expects
devfn for the UART controller corresponding to the index in
PCI_DEVFN() format). This gets rid of the SoC callback to get `struct
device` pointer to the UART controller device.
Change-Id: Id0712a0038f2cc1a61b8b5a58fa155f14e7949a5
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49212
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake/uart.c')
-rw-r--r-- | src/soc/intel/skylake/uart.c | 27 |
1 files changed, 5 insertions, 22 deletions
diff --git a/src/soc/intel/skylake/uart.c b/src/soc/intel/skylake/uart.c index 28ede6fed4..9e2dcb3b02 100644 --- a/src/soc/intel/skylake/uart.c +++ b/src/soc/intel/skylake/uart.c @@ -10,10 +10,10 @@ #include <soc/pci_devs.h> #include <soc/pcr_ids.h> -/* UART pad configuration. Support RXD and TXD for now. */ -const struct uart_gpio_pad_config uart_gpio_pads[] = { +const struct uart_controller_config uart_ctrlr_config[] = { { .console_index = 0, + .devfn = PCH_DEVFN_UART0, .gpios = { PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1), /* UART0 RX */ PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1), /* UART0 TX */ @@ -21,6 +21,7 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = { }, { .console_index = 1, + .devfn = PCH_DEVFN_UART1, .gpios = { PAD_CFG_NF(GPP_C12, NONE, DEEP, NF1), /* UART1 RX */ PAD_CFG_NF(GPP_C13, NONE, DEEP, NF1), /* UART1 TX */ @@ -28,6 +29,7 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = { }, { .console_index = 2, + .devfn = PCH_DEVFN_UART2, .gpios = { PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), /* UART2 RX */ PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), /* UART2 TX */ @@ -35,23 +37,4 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = { } }; -const int uart_max_index = ARRAY_SIZE(uart_gpio_pads); - -DEVTREE_CONST struct device *soc_uart_console_to_device(int uart_console) -{ - /* - * if index is valid, this function will return corresponding structure - * for uart console else will return NULL. - */ - switch (uart_console) { - case 0: - return pcidev_path_on_root(PCH_DEVFN_UART0); - case 1: - return pcidev_path_on_root(PCH_DEVFN_UART1); - case 2: - return pcidev_path_on_root(PCH_DEVFN_UART2); - default: - printk(BIOS_ERR, "Invalid UART console index\n"); - return NULL; - } -} +const int uart_max_index = ARRAY_SIZE(uart_ctrlr_config); |