diff options
| author | Furquan Shaikh <furquan@chromium.org> | 2017-08-17 18:28:41 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2017-08-19 00:33:04 +0000 |
| commit | aeb2d64c85ca2c3a77f50d57e3a92f6fc0a5c2d3 (patch) | |
| tree | 1b0e09b0ff072bfeb3d300c709b24d1037362a08 /src/soc/intel/skylake/smihandler.c | |
| parent | aef8542d810b737fe2653dcca1d9566292b3b65d (diff) | |
soc/intel/skylake: Enable power button SMI when jumping to payload
Instead of enabling power button SMI unconditionally, add a boot state
handler to enable power button SMI just before jumping to
payload. This ensures that:
1. We do not respond to power button SMI until we know that coreboot
is done.
2. On resume, there is no need to enable power button SMI. This avoids
any power button presses during resume path from triggering a
shutdown.
BUG=b:64811381
Change-Id: Icc52dc0103555602c23e09660bc38bb4bfddbc11
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/21082
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/soc/intel/skylake/smihandler.c')
| -rw-r--r-- | src/soc/intel/skylake/smihandler.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/smihandler.c b/src/soc/intel/skylake/smihandler.c index d87994ea16..3e79065cda 100644 --- a/src/soc/intel/skylake/smihandler.c +++ b/src/soc/intel/skylake/smihandler.c @@ -343,12 +343,13 @@ static void southbridge_smi_apmc(void) static void southbridge_smi_pm1(void) { u16 pm1_sts = clear_pm1_status(); + u16 pm1_en = read_pm1_enable(); /* * While OSPM is not active, poweroff immediately on a power button * event. */ - if (pm1_sts & PWRBTN_STS) { + if ((pm1_sts & PWRBTN_STS) && (pm1_en & PWRBTN_EN)) { /* power button pressed */ if (IS_ENABLED(CONFIG_ELOG_GSMI)) elog_add_event(ELOG_TYPE_POWER_BUTTON); |