diff options
| author | Furquan Shaikh <furquan@chromium.org> | 2017-10-11 14:44:29 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2017-10-12 22:13:39 +0000 |
| commit | c4e652ff572d7eea3bbbae21825d0085e294cb98 (patch) | |
| tree | 7a9a5ad7d0374742bb7ac091dc4f2814795e47ad /src/soc/intel/skylake/smi.c | |
| parent | bbd5ee4187dd5b85a8ccf6de28b24a70c0343174 (diff) | |
soc/intel/common: Clean up PMC library GPE handling API
1. Update gpe handling function names to explicitly mention if they
are operating on:
a. STD GPE events
b. GPIO GPE events
c. Both
2. Update comment block in pmclib.h to use generic names for STD and
GPIO GPE registers instead of using any one platform specific names.
BUG=b:67712608
Change-Id: I03349fe85ac31d4215418b884afd8c4b531e68d3
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/21968
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake/smi.c')
| -rw-r--r-- | src/soc/intel/skylake/smi.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/smi.c b/src/soc/intel/skylake/smi.c index 23b8ce8e0c..f11a9d8c26 100644 --- a/src/soc/intel/skylake/smi.c +++ b/src/soc/intel/skylake/smi.c @@ -49,7 +49,7 @@ void southbridge_smm_clear_state(void) pmc_clear_smi_status(); pmc_clear_pm1_status(); pmc_clear_tco_status(); - pmc_clear_gpe_status(); + pmc_clear_all_gpe_status(); } void southbridge_smm_enable_smi(void) @@ -57,7 +57,7 @@ void southbridge_smm_enable_smi(void) printk(BIOS_DEBUG, "Enabling SMIs.\n"); /* Configure events */ pmc_enable_pm1(GBL_EN); - pmc_disable_gpe(PME_B0_EN); + pmc_disable_std_gpe(PME_B0_EN); /* * Enable SMI generation: |