diff options
| author | Nico Huber <nico.h@gmx.de> | 2019-05-04 19:19:10 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-05-07 15:59:10 +0000 |
| commit | 3c0d23b6ab1ca23c9e54f3554386e7aa2cfec94d (patch) | |
| tree | 453c5b70613320c2e99360bfa2356d3b7542e0db /src/soc/intel/skylake/romstage | |
| parent | 0ebdf2ac75a6459534d0543d3bc963a96316f920 (diff) | |
intel/fsp1_1: Drop remnants of `pei_data`
`pei_data` was a struct with blob parameters from pre-FSP times.
Somehow, it sneaked into upstream FSP1.1 support (probably because
early board ports were written for a different blob). When added
upstream, its usage was already perverted. It was declared at SoC
level but mostly used to pass mainboard data from mainboard code
to itself and FSP data from FSP code to itself. Now that no board/
SoC code uses it anymore, we can finally drop it.
Change-Id: Ib0bc402703188539cf2254bdc395cca9dd32d863
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32596
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/soc/intel/skylake/romstage')
| -rw-r--r-- | src/soc/intel/skylake/romstage/romstage.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c index 8ec08c2d0f..12239ae13e 100644 --- a/src/soc/intel/skylake/romstage/romstage.c +++ b/src/soc/intel/skylake/romstage/romstage.c @@ -26,7 +26,6 @@ #include <intelblocks/fast_spi.h> #include <intelblocks/pmclib.h> #include <soc/pci_devs.h> -#include <soc/pei_wrapper.h> #include <soc/pm.h> #include <soc/pmc.h> #include <soc/serialio.h> @@ -44,9 +43,6 @@ void soc_pre_ram_init(struct romstage_params *params) /* Program MCHBAR and DMIBAR */ systemagent_early_init(); - /* Prepare to initialize memory */ - soc_fill_pei_data(params->pei_data); - const struct device *const dev = pcidev_path_on_root(PCH_DEVFN_LPC); const struct soc_intel_skylake_config *const config = dev ? dev->chip_info : NULL; |