diff options
author | Teo Boon Tiong <boon.tiong.teo@intel.com> | 2016-12-28 18:56:26 +0800 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2017-01-19 08:50:44 +0100 |
commit | d8e34b2c44605d2eb6ed1a955148ac24b9d0cd2e (patch) | |
tree | d559fb2824ad00b29e2dbc04523c6e1cec167860 /src/soc/intel/skylake/romstage/Makefile.inc | |
parent | 951ec96f17100692daed8c5316ffa13a7ed387d9 (diff) |
driver/intel/fsp1_1: Fix boot failure for non-verstage case
Currently car_stage_entry is defined only in romstage_after_verstage and
as a result when SEPARATE_VERSTAGE is not selected, there is no
entry point into romstage and romstage will not be started at all.
The solution is move out romstage_after_verstage.S from fsp1.1 driver
to skylake/romstage. And add CONFIG_PLATFORM_USES_FSP1_1 to fix the
build and boot issue with this change.
Besides that, rename the romstage_after_verstage to romstage_c_entry
in more appropriate naming convention after this fix.
Tested on SkyLake Saddle Brook (FSP 1.1) and KabyLake Rvp11 (FSP 2.0),
romstage can be started successfully.
Change-Id: I1cd2cf5655fdff6e23b7b76c3974e7dfd3835efd
Signed-off-by: Teo Boon Tiong <boon.tiong.teo@intel.com>
Reviewed-on: https://review.coreboot.org/17976
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/skylake/romstage/Makefile.inc')
-rw-r--r-- | src/soc/intel/skylake/romstage/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/romstage/Makefile.inc b/src/soc/intel/skylake/romstage/Makefile.inc index c19301f734..47c8c7e39c 100644 --- a/src/soc/intel/skylake/romstage/Makefile.inc +++ b/src/soc/intel/skylake/romstage/Makefile.inc @@ -1,5 +1,6 @@ verstage-y += power_state.c +romstage-$(CONFIG_PLATFORM_USES_FSP1_1) += car_stage.S romstage-$(CONFIG_PLATFORM_USES_FSP2_0) += car_stage_fsp20.S romstage-y += pmc.c romstage-y += power_state.c |