diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2017-02-03 19:05:27 +0530 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-06-09 19:26:55 +0200 |
| commit | f004f66ca7b0c428c04d6025738319187cf911fe (patch) | |
| tree | 018b0fedb7981caca6e5f207a10e8351bc25c85b /src/soc/intel/skylake/reset.c | |
| parent | 0a203d13f672b5cf12a56eaecfbcbe2e081f18ed (diff) | |
soc/intel/skylake: Enable ACPI PM timer emulation on all CPUs
This patch enables ACPI timer emulation on all the logical cpus.
BUG=chrome-os-partner:62438
BRANCH=NONE
TEST=Verify MSR 0x121 gets programmed on all logical cpus during coreboot MP Init.
Change-Id: I2246cdfe1f60fd359b0a0eda89b4a45b5554dc4a
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/18288
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake/reset.c')
0 files changed, 0 insertions, 0 deletions