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| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2020-07-01 09:32:18 -0600 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2020-07-03 02:33:33 +0000 |
| commit | a1061639d2d17886032df86c0f9b21e44b9e9818 (patch) | |
| tree | 5fab5e2dae0454a84f350e27e5d483868a896670 /src/soc/intel/skylake/reset.c | |
| parent | 7b2f5030382ada910c0a4a7dd89af0447208e988 (diff) | |
soc/intel/common: Only touch Time Window Tau bits in supported SoCs
The Time Window Tau bits are only supported by Comet Lake/Cannon Lake
onwards, so skip setting those bits for earlier SoCs.
Change-Id: Iff899ee8280a9b9bbcea57d4e98b92d5410be21d
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42979
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Diffstat (limited to 'src/soc/intel/skylake/reset.c')
0 files changed, 0 insertions, 0 deletions