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authorAaron Durbin <adurbin@chromium.org>2015-08-08 01:11:32 -0500
committerAaron Durbin <adurbin@chromium.org>2015-08-14 15:21:16 +0200
commitaf030503e8037f8147196290ea681192ab6b7732 (patch)
treeedceae2d102417e90d2b77dbe1d01a8beb418b73 /src/soc/intel/skylake/pmutil.c
parent13e2ed3f0c1c798cb08faa4ae71f501b3e792a60 (diff)
skylake: fix SMI GPI status handling
The current construction for processing SMI GPI events didn't allow for the mainboard to query the state of a particular GPI for the snapshotted SMI event. The skylake part can route GPIs from any (there are design limitations) GPIO group. Those status and enable registers are within the GPIO community so one needs to gather all the possibilities in order to query the state. The call chain did this: southbridge_smi_gpi( clear_alt_smi_status() -> reset_alt_smi_status() -> print_all_smi_status() -> return 0) As a replacement the following functions and types are introduced: struct gpi_status - represent gpi status. gpi_status_get() - per gpi query on struct gpi_status gpi_clear_get_smi_status() - clear and retrieve SMI GPI status mainboard_smi_gpi_handler() - mainboard handler using gpi_status Also remove gpio_enable_all_smi() as that construct was never used, but it also is quite heavy handed in that it would enable SMI generation for all GPIs. BUG=chrome-os-partner:43778 BRANCH=None TEST=Built. Original-Change-Id: Ief977e60de65d9964b8ee58f2433cae5c93872ca Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/291933 Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Change-Id: Ida009393c6af88ffe910195dc79a4c0d2a4c029e Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11208 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/skylake/pmutil.c')
-rw-r--r--src/soc/intel/skylake/pmutil.c48
1 files changed, 0 insertions, 48 deletions
diff --git a/src/soc/intel/skylake/pmutil.c b/src/soc/intel/skylake/pmutil.c
index 8e54db40d0..b048c99b94 100644
--- a/src/soc/intel/skylake/pmutil.c
+++ b/src/soc/intel/skylake/pmutil.c
@@ -210,54 +210,6 @@ void disable_smi(u32 mask)
outl(smi_en, ACPI_BASE_ADDRESS + SMI_EN);
}
-
-/*
- * ALT_GP_SMI
- */
-
-/* Clear GPIO SMI status and return events that are enabled and active */
-void reset_alt_smi_status(void)
-{
- /*Clear GPIO SMI Status*/
- gpio_clear_all_smi();
-}
-
-/* Print GPIO SMI status bits */
-static u32 print_alt_smi_status(void)
-{
- u32 alt_sts[GPIO_COMMUNITY_MAX];
- int gpio_index;
- /* GPIO Communities GPP_A ~ E support SMI */
- const char gpiowell[] = {
- [0] = 'A',
- [1] = 'B',
- [2] = 'C',
- [3] = 'D',
- [4] = 'E'
- };
-
- printk(BIOS_DEBUG, "ALT_STS: ");
- gpio_get_smi_status(alt_sts);
- /* GPP_A to GPP_E GPIO has Status and Enable functionality*/
- for (gpio_index = 0; gpio_index < ARRAY_SIZE(gpiowell);
- gpio_index++) {
- printk(BIOS_DEBUG, "GPIO Group_%c\n",
- gpiowell[gpio_index]);
- print_gpio_status(alt_sts[gpio_index], 0);
- }
-
- printk(BIOS_DEBUG, "\n");
-
- return 0;
-}
-
-/* Print, clear, and return GPIO SMI status */
-u32 clear_alt_smi_status(void)
-{
- reset_alt_smi_status();
- return print_alt_smi_status();
-}
-
/*
* TCO
*/