diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2017-09-15 12:37:05 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-09-20 23:54:00 +0000 |
| commit | d1fc8c13437da7326aaf189f1acc4fae4f6715b0 (patch) | |
| tree | 8a7615a2ae42d0c46ad9570c50eab99136765bef /src/soc/intel/skylake/pmc.c | |
| parent | bcd0bdabedb2b99d670afff4ef516535f66c2dbb (diff) | |
soc/intel/skylake: refactor rtc failure checking
In order to prepare for checking RTC failure in the early boot
paths move the rtc failure calculation to pmutil.c and add a helper
function to determine if failure occurred.
BUG=b:63054105
Change-Id: I88bf9bdba8c1f3a11bc8301869e3da9f033ec381
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/21554
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake/pmc.c')
| -rw-r--r-- | src/soc/intel/skylake/pmc.c | 14 |
1 files changed, 1 insertions, 13 deletions
diff --git a/src/soc/intel/skylake/pmc.c b/src/soc/intel/skylake/pmc.c index df08937739..131b6af205 100644 --- a/src/soc/intel/skylake/pmc.c +++ b/src/soc/intel/skylake/pmc.c @@ -107,22 +107,10 @@ static void pch_set_acpi_mode(void) static void pch_rtc_init(void) { - u8 reg8; - int rtc_failed; - /*PMC Controller Device 0x1F, Func 02*/ - device_t dev = PCH_DEV_PMC; - reg8 = pci_read_config8(dev, GEN_PMCON_B); - rtc_failed = reg8 & RTC_BATTERY_DEAD; - if (rtc_failed) { - reg8 &= ~RTC_BATTERY_DEAD; - pci_write_config8(dev, GEN_PMCON_B, reg8); - printk(BIOS_DEBUG, "rtc_failed = 0x%x\n", rtc_failed); - } - /* Ensure the date is set including century byte. */ cmos_check_update_date(); - cmos_init(rtc_failed); + cmos_init(rtc_failure()); } static void pch_power_options(void) |