diff options
| author | Lee Leahy <leroy.p.leahy@intel.com> | 2015-05-12 18:23:27 -0700 |
|---|---|---|
| committer | Leroy P Leahy <leroy.p.leahy@intel.com> | 2015-07-16 17:24:48 +0200 |
| commit | 1d14b3e926c15027f9272f1e80b8913fef8cf25d (patch) | |
| tree | b3d89ad4bb1b0ea5ac05d1d7dc6cbf26ec93e6c3 /src/soc/intel/skylake/pei_data.c | |
| parent | b000513741d330947bb832a5835378e35bdfb394 (diff) | |
soc/intel: Add Skylake SOC support
Add the files to support the Skylake SOC.
Matches chromium tree at 927026db
BRANCH=none
BUG=None
TEST=Build and run on a Skylake platform
Change-Id: I80248f7e47eaf13b52e3c7ff951eb1976edbaa15
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/10341
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/pei_data.c')
| -rw-r--r-- | src/soc/intel/skylake/pei_data.c | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/src/soc/intel/skylake/pei_data.c b/src/soc/intel/skylake/pei_data.c index 180f0caf8e..b943224cdc 100644 --- a/src/soc/intel/skylake/pei_data.c +++ b/src/soc/intel/skylake/pei_data.c @@ -2,6 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2014 Google Inc. + * Copyright (C) 2015 Intel Corporation. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -14,12 +15,13 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Foundation, Inc. */ +#include <console/console.h> +#include <console/streams.h> #include <stdlib.h> #include <stdint.h> -#include <console/streams.h> #include <soc/iomap.h> #include <soc/pei_data.h> #include <soc/pei_wrapper.h> @@ -30,18 +32,15 @@ static void ABI_X86 send_to_console(unsigned char b) console_tx_byte(b); } -void broadwell_fill_pei_data(struct pei_data *pei_data) +void soc_fill_pei_data(struct pei_data *pei_data) { pei_data->pei_version = PEI_VERSION; pei_data->board_type = BOARD_TYPE_ULT; - pei_data->usbdebug = CONFIG_USBDEBUG; pei_data->pciexbar = MCFG_BASE_ADDRESS; pei_data->smbusbar = SMBUS_BASE_ADDRESS; - pei_data->ehcibar = EARLY_EHCI_BAR; pei_data->xhcibar = EARLY_XHCI_BAR; pei_data->gttbar = EARLY_GTT_BAR; pei_data->pmbase = ACPI_BASE_ADDRESS; - pei_data->gpiobase = GPIO_BASE_ADDRESS; pei_data->tseg_size = smm_region_size(); pei_data->temp_mmio_base = EARLY_TEMP_MMIO; pei_data->tx_byte = &send_to_console; |