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author | Zhao, Lijian <lijian.zhao@intel.com> | 2016-05-17 19:26:18 -0700 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2016-06-09 20:23:50 +0200 |
commit | 1a718642ead0aa42561e4db30431066d53fdb57c (patch) | |
tree | 0b9983098923cd251c0762ca365e81d0051f0ce2 /src/soc/intel/skylake/pcr.c | |
parent | 1b8ee0b88a2d3be79642aff390f3bcc98ad22036 (diff) |
intel/amenia: Program EMMC dll setting
EMMC TX DATA Control needs to be programmed to 0x1A1A to make amenia
system can run stable on EMMC with HS400 mode.
Change-Id: I42c23ff7e6956e75de5e1b1339a570b35d999301
Signed-off-by: Zhao, Lijian <lijian.zhao@intel.com>
Tested-by: Petrov, Andrey <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/15092
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/pcr.c')
0 files changed, 0 insertions, 0 deletions