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authorNico Huber <nico.h@gmx.de>2024-07-21 12:47:34 +0200
committerMartin L Roth <gaumless@gmail.com>2024-10-16 15:19:49 +0000
commita53b77effb84b7b3781275e7c37ec58e0c0ac148 (patch)
treec934fcb0df36cedc80f286fbaa749977720fd86f /src/soc/intel/skylake/p2sb.c
parent9fe0ad0e21fcea6aa1417578794ffbfca58da395 (diff)
device/azalia: Clear busy bit after failed verb command
The spec tells us to clear the busy bit manually after a timeout. Do that and wait immediately, to detect further issues early. Also fix some related comments and prints: Failures shouldn't be debug messa- ges. And we are talking to the PIO interface of the controller, not the codec. So this was never about the codec being ready. Change-Id: I4b737f8259157c01bfcd9e6631cc15d39c653d06 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83592 Reviewed-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake/p2sb.c')
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