diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2017-03-05 12:37:00 +0530 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-03-28 16:39:28 +0200 |
| commit | 2ee54db24603f51738cbebd6d80c120f2b4db76d (patch) | |
| tree | 32670a0d223cde958305c1b2288b0f09a9e5a3b0 /src/soc/intel/skylake/irq.c | |
| parent | fc4c7d8320d329d3712cb74e527dca4178f71bf8 (diff) | |
soc/pci_devs.h: Use consistent naming in soc/pci_devs.h
This patch to make common PCI device name between APL and SKL.
Change-Id: I5e4c7502e9678c0a367e9c7a96cf848d5b24f68e
Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/18576
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/skylake/irq.c')
| -rw-r--r-- | src/soc/intel/skylake/irq.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/src/soc/intel/skylake/irq.c b/src/soc/intel/skylake/irq.c index 6d3aa7b393..649f1375cb 100644 --- a/src/soc/intel/skylake/irq.c +++ b/src/soc/intel/skylake/irq.c @@ -157,20 +157,20 @@ static const SI_PCH_DEVICE_INTERRUPT_CONFIG devintconfig[] = { DEVICE_INT_CONFIG(PCH_DEV_SLOT_SATA, PCI_FUNC(PCH_DEVFN_SATA), int_A, SATA_IRQ), /* CSME: HECI #1 */ - DEVICE_INT_CONFIG(PCH_DEV_SLOT_ME, - PCI_FUNC(PCH_DEVFN_ME), int_A, HECI_1_IRQ), + DEVICE_INT_CONFIG(PCH_DEV_SLOT_CSE, + PCI_FUNC(PCH_DEVFN_CSE), int_A, HECI_1_IRQ), /* CSME: HECI #2 */ - DEVICE_INT_CONFIG(PCH_DEV_SLOT_ME, - PCI_FUNC(PCH_DEVFN_ME_2), int_B, HECI_2_IRQ), + DEVICE_INT_CONFIG(PCH_DEV_SLOT_CSE, + PCI_FUNC(PCH_DEVFN_CSE_2), int_B, HECI_2_IRQ), /* CSME: IDE-Redirection (IDE-R) */ - DEVICE_INT_CONFIG(PCH_DEV_SLOT_ME, - PCI_FUNC(PCH_DEVFN_ME_IDER), int_C, IDER_IRQ), + DEVICE_INT_CONFIG(PCH_DEV_SLOT_CSE, + PCI_FUNC(PCH_DEVFN_CSE_IDER), int_C, IDER_IRQ), /* CSME: Keyboard and Text (KT) Redirection */ - DEVICE_INT_CONFIG(PCH_DEV_SLOT_ME, - PCI_FUNC(PCH_DEVFN_ME_KT), int_D, KT_IRQ), + DEVICE_INT_CONFIG(PCH_DEV_SLOT_CSE, + PCI_FUNC(PCH_DEVFN_CSE_KT), int_D, KT_IRQ), /* CSME: HECI #3 */ - DEVICE_INT_CONFIG(PCH_DEV_SLOT_ME, - PCI_FUNC(PCH_DEVFN_ME_3), int_A, HECI_3_IRQ), + DEVICE_INT_CONFIG(PCH_DEV_SLOT_CSE, + PCI_FUNC(PCH_DEVFN_CSE_3), int_A, HECI_3_IRQ), /* * SerialIo I2C Controller #0, INTA is default, * programmed in PCR[SERIALIO] + PCICFGCTRL[1] |