diff options
author | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-16 16:38:26 -0700 |
---|---|---|
committer | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-17 01:52:54 +0100 |
commit | 573564cca8cd01cadf179546b8b124694fd3dcbb (patch) | |
tree | bb2c4c9c61b07f6a9a3c94446927341492f56afe /src/soc/intel/skylake/include | |
parent | 6a1503e9db4bb9b5e6bb47f298eb3677c0673bc4 (diff) |
soc/intel/skylake: Add int to unsigned
Fix the following warning detected by checkpatch.pl:
WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
TEST=Build for glados
Change-Id: Idc2ad265e8ed8cd7fd6d228cfbe4cbbcb9d3ebfc
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18866
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/include')
-rw-r--r-- | src/soc/intel/skylake/include/fsp11/soc/romstage.h | 2 | ||||
-rw-r--r-- | src/soc/intel/skylake/include/fsp20/soc/romstage.h | 2 | ||||
-rw-r--r-- | src/soc/intel/skylake/include/soc/flash_controller.h | 12 | ||||
-rw-r--r-- | src/soc/intel/skylake/include/soc/pci_devs.h | 6 | ||||
-rw-r--r-- | src/soc/intel/skylake/include/soc/smbus.h | 8 |
5 files changed, 15 insertions, 15 deletions
diff --git a/src/soc/intel/skylake/include/fsp11/soc/romstage.h b/src/soc/intel/skylake/include/fsp11/soc/romstage.h index 6c40bd626d..f3e4371352 100644 --- a/src/soc/intel/skylake/include/fsp11/soc/romstage.h +++ b/src/soc/intel/skylake/include/fsp11/soc/romstage.h @@ -22,7 +22,7 @@ void systemagent_early_init(void); void intel_early_me_status(void); void enable_smbus(void); -int smbus_read_byte(unsigned device, unsigned address); +int smbus_read_byte(unsigned int device, unsigned int address); int early_spi_read_wpsr(u8 *sr); void mainboard_fill_spd_data(struct pei_data *pei_data); diff --git a/src/soc/intel/skylake/include/fsp20/soc/romstage.h b/src/soc/intel/skylake/include/fsp20/soc/romstage.h index 41658e1dbd..37e1e06fc9 100644 --- a/src/soc/intel/skylake/include/fsp20/soc/romstage.h +++ b/src/soc/intel/skylake/include/fsp20/soc/romstage.h @@ -23,7 +23,7 @@ asmlinkage void *car_stage_c_entry(void); void mainboard_memory_init_params(FSPM_UPD *mupd); void systemagent_early_init(void); -int smbus_read_byte(unsigned device, unsigned address); +int smbus_read_byte(unsigned int device, unsigned int address); int early_spi_read_wpsr(u8 *sr); /* Board type */ enum board_type { diff --git a/src/soc/intel/skylake/include/soc/flash_controller.h b/src/soc/intel/skylake/include/soc/flash_controller.h index 25e77344e5..712a18df19 100644 --- a/src/soc/intel/skylake/include/soc/flash_controller.h +++ b/src/soc/intel/skylake/include/soc/flash_controller.h @@ -35,7 +35,7 @@ static u8 readb_(const void *addr) { u8 v = read8(addr); printk(BIOS_DEBUG, "read %2.2x from %4.4x\n", - v, ((unsigned) addr & 0xffff) - 0xf020); + v, ((unsigned int) addr & 0xffff) - 0xf020); return v; } @@ -43,7 +43,7 @@ static u16 readw_(const void *addr) { u16 v = read16(addr); printk(BIOS_DEBUG, "read %4.4x from %4.4x\n", - v, ((unsigned) addr & 0xffff) - 0xf020); + v, ((unsigned int) addr & 0xffff) - 0xf020); return v; } @@ -51,7 +51,7 @@ static u32 readl_(const void *addr) { u32 v = read32(addr); printk(BIOS_DEBUG, "read %8.8x from %4.4x\n", - v, ((unsigned) addr & 0xffff) - 0xf020); + v, ((unsigned int) addr & 0xffff) - 0xf020); return v; } @@ -59,21 +59,21 @@ static void writeb_(u8 b, void *addr) { write8(addr, b); printk(BIOS_DEBUG, "wrote %2.2x to %4.4x\n", - b, ((unsigned) addr & 0xffff) - 0xf020); + b, ((unsigned int) addr & 0xffff) - 0xf020); } static void writew_(u16 b, void *addr) { write16(addr, b); printk(BIOS_DEBUG, "wrote %4.4x to %4.4x\n", - b, ((unsigned) addr & 0xffff) - 0xf020); + b, ((unsigned int) addr & 0xffff) - 0xf020); } static void writel_(u32 b, void *addr) { write32(addr, b); printk(BIOS_DEBUG, "wrote %8.8x to %4.4x\n", - b, ((unsigned) addr & 0xffff) - 0xf020); + b, ((unsigned int) addr & 0xffff) - 0xf020); } #else /* CONFIG_DEBUG_SPI_FLASH ^^^ enabled vvv NOT enabled */ diff --git a/src/soc/intel/skylake/include/soc/pci_devs.h b/src/soc/intel/skylake/include/soc/pci_devs.h index a19a7c6007..10d480664d 100644 --- a/src/soc/intel/skylake/include/soc/pci_devs.h +++ b/src/soc/intel/skylake/include/soc/pci_devs.h @@ -149,7 +149,7 @@ #define PCH_DEV_GBE _PCH_DEV(LPC, 6) /* Convert I2C bus number to PCI device and function */ -static inline int i2c_bus_to_devfn(unsigned bus) +static inline int i2c_bus_to_devfn(unsigned int bus) { switch (bus) { case 0: return PCH_DEVFN_I2C0; @@ -163,7 +163,7 @@ static inline int i2c_bus_to_devfn(unsigned bus) } /* Convert PCI device and function to I2C bus number */ -static inline int i2c_devfn_to_bus(unsigned devfn) +static inline int i2c_devfn_to_bus(unsigned int devfn) { switch (devfn) { case PCH_DEVFN_I2C0: return 0; @@ -176,7 +176,7 @@ static inline int i2c_devfn_to_bus(unsigned devfn) return -1; } -static inline int spi_devfn_to_bus(unsigned devfn) +static inline int spi_devfn_to_bus(unsigned int devfn) { switch (devfn) { case PCH_DEVFN_SPI: return 0; diff --git a/src/soc/intel/skylake/include/soc/smbus.h b/src/soc/intel/skylake/include/soc/smbus.h index 856b4a9d63..1e4d59bc24 100644 --- a/src/soc/intel/skylake/include/soc/smbus.h +++ b/src/soc/intel/skylake/include/soc/smbus.h @@ -54,9 +54,9 @@ #define SMBUS_TIMEOUT (10 * 1000 * 100) #define SMBUS_SLAVE_ADDR 0x24 -int do_smbus_read_byte(unsigned smbus_base, unsigned device, - unsigned address); -int do_smbus_write_byte(unsigned smbus_base, unsigned device, - unsigned address, unsigned data); +int do_smbus_read_byte(unsigned int smbus_base, unsigned int device, + unsigned int address); +int do_smbus_write_byte(unsigned int smbus_base, unsigned int device, + unsigned int address, unsigned int data); #endif |