diff options
| author | Aamir Bohra <aamir.bohra@intel.com> | 2017-06-02 11:56:14 +0530 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-06-05 00:30:11 +0200 |
| commit | 1041d399cbbae9042a021502f9e105b078f5046e (patch) | |
| tree | 43fc598d654fe3df45379efdce6681770a57e7bc /src/soc/intel/skylake/include | |
| parent | 5391e554e190d746ae54d09cd97c313736a04027 (diff) | |
soc/intel/skylake: Add config for cpu base clock frequency
Add config for cpu base clock frequency(Mhz) and replace current
refrence from soc/cpu.h with config option.
Change-Id: Idf8e85f7ae6d965fa987a4f5c4905503ee354d69
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/20016
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/include')
| -rw-r--r-- | src/soc/intel/skylake/include/soc/cpu.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/soc/intel/skylake/include/soc/cpu.h b/src/soc/intel/skylake/include/soc/cpu.h index 9171172272..f6803c9e04 100644 --- a/src/soc/intel/skylake/include/soc/cpu.h +++ b/src/soc/intel/skylake/include/soc/cpu.h @@ -34,9 +34,6 @@ #define CPUID_KABYLAKE_HA0 0x506e8 #define CPUID_KABYLAKE_HB0 0x906e9 -/* CPU bus clock is fixed at 100MHz */ -#define CPU_BCLK 100 - /* Latency times in units of 1024ns. */ #define C_STATE_LATENCY_CONTROL_0_LIMIT 0x4e #define C_STATE_LATENCY_CONTROL_1_LIMIT 0x76 |