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authorDuncan Laurie <dlaurie@chromium.org>2016-10-25 20:03:56 -0700
committerDuncan Laurie <dlaurie@chromium.org>2016-10-27 16:30:36 +0200
commitf0ba2259b84c1f5083dab14925351ddf8b245e11 (patch)
treebcda19afec97488539f1d52f2c0af936e6ed321b /src/soc/intel/skylake/include
parent64ce1d122c0464a4ef138fb7452a91b408b1a7c2 (diff)
skylake: Prepare GPE for use in bootblock
Export the pmc_gpe_init() function from pmc.c to pmutil.c so it can be used in bootblock, and then call it from there to initialize any GPEs for use in firmware. BUG=chrome-os-partner:58666 TEST=test working GPE as TPM interrupt on skylake board Change-Id: I6b4f7d0aa689db42dc455075f84ab5694e8c9661 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/17135 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc/intel/skylake/include')
-rw-r--r--src/soc/intel/skylake/include/soc/pci_devs.h2
-rw-r--r--src/soc/intel/skylake/include/soc/pm.h3
2 files changed, 4 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/include/soc/pci_devs.h b/src/soc/intel/skylake/include/soc/pci_devs.h
index 476e2c6a56..974f1d8e19 100644
--- a/src/soc/intel/skylake/include/soc/pci_devs.h
+++ b/src/soc/intel/skylake/include/soc/pci_devs.h
@@ -23,7 +23,7 @@
#define _SA_DEVFN(slot) PCI_DEVFN(SA_DEV_SLOT_ ## slot, 0)
#define _PCH_DEVFN(slot, func) PCI_DEVFN(PCH_DEV_SLOT_ ## slot, func)
-#if ENV_RAMSTAGE
+#if ENV_RAMSTAGE && !defined(__SIMPLE_DEVICE__)
#include <device/device.h>
#include <device/pci_def.h>
#define _SA_DEV(slot) dev_find_slot(0, _SA_DEVFN(slot))
diff --git a/src/soc/intel/skylake/include/soc/pm.h b/src/soc/intel/skylake/include/soc/pm.h
index 235ad898e0..ede3efb982 100644
--- a/src/soc/intel/skylake/include/soc/pm.h
+++ b/src/soc/intel/skylake/include/soc/pm.h
@@ -186,6 +186,9 @@ uint16_t smbus_tco_regs(void);
/* Set the DISB after DRAM init */
void pmc_set_disb(void);
+/* Initialize GPEs */
+void pmc_gpe_init(void);
+
static inline int deep_s3_enabled(void)
{
uint32_t deep_s3_pol;