skylake: Add initial FSP2.0 support

Add Initial pieces of code to support fsp2.0 in skylake keeping
the fsp1.1 flow intact.

The soc/romstage.h and soc/ramstage.h have a reference to
fsp driver includes, so split these header files for
each version of FSP driver.

Add the below files,
car_stage.S:
	Add romstage entry point (car_stage_entry).
	This calls into romstage_fsp20.c and aslo handles
	the car teardown.
romstage_fsp20.c:
	Call fsp_memory_init() and also has the callback
	for filling memory init parameters.

Also add monotonic_timer.c to verstage.

With this patchset and relevant change in kunimitsu mainboard,
we are able to boot to romstage.

TEST= Build and Boot Kunimitsu with PLATFORM_USES_FSP1_1
Build and Boot Kunimitsu to romstage with PLATFORM_USES_FSP2_0

Change-Id: I4309c8d4369c84d2bd1b13e8ab7bfeaaec645520
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/16267
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)

1 files changed, 2 insertions, 27 deletions

diff --git a/src/soc/intel/skylake/igd.c b/src/soc/intel/skylake/igd.c
index a8ac645409..93f05cc150 100644
--- a/src/soc/intel/skylake/igd.c
+++ b/src/soc/intel/skylake/igd.c
@@ -24,7 +24,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <drivers/intel/gma/i915_reg.h>
-#include <fsp/gop.h>
 #include <soc/acpi.h>
 #include <soc/cpu.h>
 #include <soc/pm.h>
@@ -117,35 +116,10 @@ static void igd_init(struct device *dev)
 }
 
 /* Initialize IGD OpRegion, called from ACPI code */
-static int init_igd_opregion(igd_opregion_t *opregion)
+static int update_igd_opregion(igd_opregion_t *opregion)
 {
-	const optionrom_vbt_t *vbt;
-	uint32_t vbt_len;
 	u16 reg16;
 
-	memset(opregion, 0, sizeof(igd_opregion_t));
-
-	/* Read VBT table from flash */
-	vbt = fsp_get_vbt(&vbt_len);
-	if (!vbt)
-		die("vbt data not found");
-
-	memcpy(&opregion->header.signature, IGD_OPREGION_SIGNATURE,
-		sizeof(IGD_OPREGION_SIGNATURE) - 1);
-	memcpy(opregion->header.vbios_version, vbt->coreblock_biosbuild, sizeof(u32));
-	memcpy(opregion->vbt.gvd1, vbt, vbt->hdr_vbt_size <
-		sizeof(opregion->vbt.gvd1) ? vbt->hdr_vbt_size :
-		sizeof(opregion->vbt.gvd1));
-
-	/* Size, in KB, of the entire OpRegion structure (including header)*/
-	opregion->header.size = sizeof(igd_opregion_t) / KiB;
-	opregion->header.version = IGD_OPREGION_VERSION;
-
-	/* We just assume we're mobile for now */
-	opregion->header.mailboxes = MAILBOXES_MOBILE;
-
-	/* TODO Initialize Mailbox 1 */
-
 	/* Initialize Mailbox 3 */
 	opregion->mailbox3.bclp = IGD_BACKLIGHT_BRIGHTNESS;
 	opregion->mailbox3.pfit = IGD_FIELD_VALID | IGD_PFIT_STRETCH;
@@ -189,6 +163,7 @@ static unsigned long write_acpi_igd_opregion(device_t device,
 	printk(BIOS_DEBUG, "ACPI: * IGD OpRegion\n");
 	opregion = (igd_opregion_t *)current;
 	init_igd_opregion(opregion);
+	update_igd_opregion(opregion);
 	current += sizeof(igd_opregion_t);
 	current = acpi_align_current(current);