diff options
author | Lean Sheng Tan <sheng.tan@9elements.com> | 2022-04-01 12:03:51 +0200 |
---|---|---|
committer | Angel Pons <th3fanbus@gmail.com> | 2022-04-04 17:48:56 +0000 |
commit | 9e78dd13577b577f96699710fefd965acda686e1 (patch) | |
tree | 9e6f2bb50eda7d698ba9ca14e5971537885d197e /src/soc/intel/skylake/gspi.c | |
parent | 74d6efc924326b5858fabbafa58ce095d4cca38d (diff) |
soc/intel/alderlake: Update CPU IDs with correct steppings
Update ADL CPU IDs per correct steppings listed in Intel Doc 626774.
Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com>
Change-Id: I722043c493b8c3de8965bcaa13f33c907d51f284
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63299
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/skylake/gspi.c')
0 files changed, 0 insertions, 0 deletions