diff options
| author | Nico Huber <nico.h@gmx.de> | 2017-09-18 20:03:46 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-04-05 15:53:20 +0000 |
| commit | c37b0e3d07e453971e4778bb167030d335f946b8 (patch) | |
| tree | 0086c3946a57863cb85ed50c28af27062d245cb3 /src/soc/intel/skylake/chip_fsp20.c | |
| parent | 2afe4dc075fd2cab8d362aa026066a5f53663f2c (diff) | |
soc/intel/skylake: Generate ACPI DMAR table
If the SoC is VT-d capable, write an ACPI DMAR table. The entry for the
GFXVTBAR is only generated if the IGD is enabled.
Change-Id: I8176401dd19aee7ad09a8a145b7a3801fe5b2ae1
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/21588
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Youness Alaoui <snifikino@gmail.com>
Diffstat (limited to 'src/soc/intel/skylake/chip_fsp20.c')
| -rw-r--r-- | src/soc/intel/skylake/chip_fsp20.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index 4ac73b57c6..054ed089dc 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -60,7 +60,8 @@ static struct device_operations pci_domain_ops = { .scan_bus = &pci_domain_scan_bus, .ops_pci_bus = &pci_bus_default_ops, #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) - .acpi_name = &soc_acpi_name, + .write_acpi_tables = &northbridge_write_acpi_tables, + .acpi_name = &soc_acpi_name, #endif }; |