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authorDuncan Laurie <dlaurie@chromium.org>2016-06-06 17:21:00 -0700
committerDuncan Laurie <dlaurie@chromium.org>2016-06-09 17:08:33 +0200
commitc8d45ac88e0c1170bb1b8b01a52701d96416e626 (patch)
tree30b4a2eeaec256a4f17e69c121b1560fd07c1942 /src/soc/intel/skylake/chip.h
parent7f3156dad67ad35f02afedd85cdf4a19e3c0875e (diff)
skylake: Move I2C bus configuration to separate structure
Move the existing I2C voltage configuration variable into a new structure that is equivalent, similar to how USB ports are configured. This is to make room for additional I2C configuration options like bus speed and whether to enable the bus in early boot which are coming in a subsequent commit. The affected mainboards are updated in this commit so it will build. Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Change-Id: Id2dea3df93e49000d60ddc66eb35d06cca6dd47e Reviewed-on: https://review.coreboot.org/15104 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc/intel/skylake/chip.h')
-rw-r--r--src/soc/intel/skylake/chip.h16
1 files changed, 14 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index 2db84b7f25..1d3113f481 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -29,6 +29,18 @@
#include <soc/usb.h>
#include <soc/vr_config.h>
+#define SKYLAKE_I2C_DEV_MAX 6
+
+enum skylake_i2c_voltage {
+ I2C_VOLTAGE_3V3,
+ I2C_VOLTAGE_1V8
+};
+
+struct skylake_i2c_config {
+ /* Bus voltage level, default is 3.3V */
+ enum skylake_i2c_voltage voltage;
+};
+
struct soc_intel_skylake_config {
/*
* Interrupt Routing configuration
@@ -179,8 +191,8 @@ struct soc_intel_skylake_config {
*/
u8 SerialIoDevMode[PchSerialIoIndexMax];
- /* I2C voltage select. Value: 0: 3.3V , 1: 1.8V.*/
- u8 SerialIoI2cVoltage[6];
+ /* I2C */
+ struct skylake_i2c_config i2c[SKYLAKE_I2C_DEV_MAX];
/* Camera */
u8 Cio2Enable;