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authorRizwan Qureshi <rizwan.qureshi@intel.com>2015-11-20 11:46:54 +0530
committerPatrick Georgi <pgeorgi@google.com>2016-01-16 11:58:31 +0100
commit2b1e8b3c3d8ee17124fe98a31ed31815ac03539d (patch)
tree8dfdc69c066cf0f5d5027b4207b30ff3877f61dd /src/soc/intel/skylake/chip.h
parentb6319c1121332551a51a9ef7d88c3e7ed8d0670d (diff)
intel/skylake: Add VrConfig UPD parameters from coreboot
Adding VrConfig UPDs and assign values to those from devicetree BRANCH=none BUG=chrome-os-partner:45387 TEST=Build and booted in kunimitsu CQ-DEPEND=CL:310192 Change-Id: Ifce9dfacabc742b55266c48459c56c69b1f22236 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: b34a3cc77afc8795abb64972f8169986c30c2acd Original-Change-Id: Ifa960e718ed77db729f1fc4e2c00c9b305093e04 Original-Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com> Original-Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/311317 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/12944 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/skylake/chip.h')
-rw-r--r--src/soc/intel/skylake/chip.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index 2a1980c8a3..1ff1fcfc1c 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -25,6 +25,7 @@
#include <soc/pmc.h>
#include <soc/serialio.h>
#include <soc/usb.h>
+#include <soc/vr_config.h>
struct soc_intel_skylake_config {
/*
@@ -325,6 +326,11 @@ struct soc_intel_skylake_config {
*/
u8 SerialIrqConfigStartFramePulse;
u8 SkipMpInit;
+ /* VrConfig Settings for 5 domains
+ * 0 = System Agent, 1 = IA Core, 2 = Ring,
+ * 3 = GT unsliced, 4 = GT sliced
+ */
+ struct vr_config domain_vr_config[NUM_VR_DOMAINS];
};
typedef struct soc_intel_skylake_config config_t;