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authorDuncan Laurie <dlaurie@chromium.org>2018-03-26 02:24:18 -0700
committerDuncan Laurie <dlaurie@chromium.org>2018-03-28 22:52:38 +0000
commitf5116952bb77ac361ad541dea00d9df28067219e (patch)
tree16ef5146141c8cd340d6f67605234870f36c89d6 /src/soc/intel/skylake/chip.h
parent8b76605a4af9b45894c39cd7b9c480bd96f523cd (diff)
soc/intel/skylake: Limit xDCI feature when VBOOT is enabled
Use the common xDCI function to check if the controller is allowed in the current mode before enabling it. Otherwise, disable the PCI device if it has been enabled in devicetree. To make the SOC behavior consistent the XdciEnable config option is removed in favor of direct control by devicetree.cb and the mainboards that had defined it were adjusted accordingly. This was tested on an Eve board with xDCI enabled in devicetree.cb to ensure the xDCI device is enabled in developer mode and disabled in normal mode. Change-Id: Ic3c84beac87452f17490de32082030880834501d Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/25365 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake/chip.h')
-rw-r--r--src/soc/intel/skylake/chip.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index b77f6dc771..dc7986948f 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -237,7 +237,6 @@ struct soc_intel_skylake_config {
/* USB related */
struct usb2_port_config usb2_ports[16];
struct usb3_port_config usb3_ports[10];
- u8 XdciEnable;
u8 SsicPortEnable;
/* SMBus */