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| author | Andrey Petrov <andrey.petrov@intel.com> | 2016-04-23 13:15:51 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-04-28 05:16:02 +0200 |
| commit | f748f83ecb389552e7afe10ce8837b5173534b96 (patch) | |
| tree | 1415c1baa04e2681d421cccc9f01fcbb7286a946 /src/soc/intel/skylake/chip.c | |
| parent | 2b9a5f5688db5a19a2511a19b91025440d9c138f (diff) | |
soc/intel/apollolake: Enable RAM cache for cbmem region in ramstage
Use postcar infrastructure to enable caching of area where ramstage
runs.
Change-Id: I3f2f6e82f3b9060c7350ddff754cd3dbcf457671
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/14095
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/chip.c')
0 files changed, 0 insertions, 0 deletions