soc/intel/skylake: Use `is_devfn_enabled()`

Use the `is_devfn_enabled()` function for the sake of brevity.

Change-Id: Ic848767799e165200f26c2d5a58fbd3b72b9c240
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55786
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 15 insertions, 33 deletions

diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c
index d4e8341cdc..f0ed699b90 100644
--- a/src/soc/intel/skylake/chip.c
+++ b/src/soc/intel/skylake/chip.c
@@ -283,8 +283,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
 		}
 	}
 
-	dev = pcidev_path_on_root(PCH_DEVFN_SATA);
-	params->SataEnable = dev && dev->enabled;
+	params->SataEnable = is_devfn_enabled(PCH_DEVFN_SATA);
 	if (params->SataEnable) {
 		memcpy(params->SataPortsEnable, config->SataPortsEnable,
 				sizeof(params->SataPortsEnable));
@@ -350,17 +349,13 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
 	memcpy(params->SerialIoDevMode, config->SerialIoDevMode,
 	       sizeof(params->SerialIoDevMode));
 
-	dev = pcidev_path_on_root(PCH_DEVFN_CIO);
-	params->PchCio2Enable = dev && dev->enabled;
+	params->PchCio2Enable = is_devfn_enabled(PCH_DEVFN_CIO);
 
-	dev = pcidev_path_on_root(SA_DEVFN_IMGU);
-	params->SaImguEnable = dev && dev->enabled;
+	params->SaImguEnable = is_devfn_enabled(SA_DEVFN_IMGU);
 
-	dev = pcidev_path_on_root(SA_DEVFN_CHAP);
-	tconfig->ChapDeviceEnable = dev && dev->enabled;
+	tconfig->ChapDeviceEnable = is_devfn_enabled(SA_DEVFN_CHAP);
 
-	dev = pcidev_path_on_root(PCH_DEVFN_CSE_3);
-	params->Heci3Enabled = dev && dev->enabled;
+	params->Heci3Enabled = is_devfn_enabled(PCH_DEVFN_CSE_3);
 
 	params->CpuConfig.Bits.VmxEnable = CONFIG(ENABLE_VMX);
 
@@ -368,8 +363,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
 	params->PchPmWoWlanDeepSxEnable = config->PchPmWoWlanDeepSxEnable;
 	params->PchPmLanWakeFromDeepSx = config->WakeConfigPcieWakeFromDeepSx;
 
-	dev = pcidev_path_on_root(PCH_DEVFN_GBE);
-	params->PchLanEnable = dev && dev->enabled;
+	params->PchLanEnable = is_devfn_enabled(PCH_DEVFN_GBE);
 	if (params->PchLanEnable) {
 		params->PchLanLtrEnable = config->EnableLanLtr;
 		params->PchLanK1OffEnable = config->EnableLanK1Off;
@@ -378,12 +372,10 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
 	}
 	params->SsicPortEnable = config->SsicPortEnable;
 
-	dev = pcidev_path_on_root(PCH_DEVFN_EMMC);
-	params->ScsEmmcEnabled = dev && dev->enabled;
+	params->ScsEmmcEnabled = is_devfn_enabled(PCH_DEVFN_EMMC);
 	params->ScsEmmcHs400Enabled = config->ScsEmmcHs400Enabled;
 
-	dev = pcidev_path_on_root(PCH_DEVFN_SDCARD);
-	params->ScsSdCardEnabled = dev && dev->enabled;
+	params->ScsSdCardEnabled = is_devfn_enabled(PCH_DEVFN_SDCARD);
 
 	if (!!params->ScsEmmcHs400Enabled && !!config->EmmcHs400DllNeed) {
 		params->PchScsEmmcHs400DllDataValid =
@@ -395,20 +387,16 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
 	}
 
 	/* If ISH is enabled, enable ISH elements */
-	dev = pcidev_path_on_root(PCH_DEVFN_ISH);
-	params->PchIshEnable = dev && dev->enabled;
+	params->PchIshEnable = is_devfn_enabled(PCH_DEVFN_ISH);
 
-	dev = pcidev_path_on_root(PCH_DEVFN_HDA);
-	params->PchHdaEnable = dev && dev->enabled;
+	params->PchHdaEnable = is_devfn_enabled(PCH_DEVFN_HDA);
 
 	params->PchHdaVcType = config->PchHdaVcType;
 	params->PchHdaIoBufferOwnership = config->IoBufferOwnership;
 	params->PchHdaDspEnable = config->DspEnable;
 
-	dev = pcidev_path_on_root(SA_DEVFN_TS);
-	params->Device4Enable = dev && dev->enabled;
-	dev = pcidev_path_on_root(PCH_DEVFN_THERMAL);
-	params->PchThermalDeviceEnable = dev && dev->enabled;
+	params->Device4Enable = is_devfn_enabled(SA_DEVFN_TS);
+	params->PchThermalDeviceEnable = is_devfn_enabled(PCH_DEVFN_THERMAL);
 
 	tconfig->PchLockDownGlobalSmi = config->LockDownConfigGlobalSmi;
 	tconfig->PchLockDownRtcLock = config->LockDownConfigRtcLock;
@@ -467,8 +455,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
 		fill_vr_domain_config(params, i, &config->domain_vr_config[i]);
 
 	/* Show SPI controller if enabled in devicetree.cb */
-	dev = pcidev_path_on_root(PCH_DEVFN_SPI);
-	params->ShowSpiController = dev && dev->enabled;
+	params->ShowSpiController = is_devfn_enabled(PCH_DEVFN_SPI);
 
 	/* Enable xDCI controller if enabled in devicetree and allowed */
 	dev = pcidev_path_on_root(PCH_DEVFN_USBOTG);
@@ -481,8 +468,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
 	}
 
 	/* Enable or disable Gaussian Mixture Model in devicetree */
-	dev = pcidev_path_on_root(SA_DEVFN_GMM);
-	params->GmmEnable = dev && dev->enabled;
+	params->GmmEnable = is_devfn_enabled(SA_DEVFN_GMM);
 
 	/*
 	 * Send VR specific mailbox commands:
@@ -531,11 +517,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
 		tconfig->VtdDisable = 0;
 	}
 
-	dev = pcidev_path_on_root(SA_DEVFN_IGD);
-	if (CONFIG(RUN_FSP_GOP) && dev && dev->enabled)
-		params->PeiGraphicsPeimInit = 1;
-	else
-		params->PeiGraphicsPeimInit = 0;
+	params->PeiGraphicsPeimInit = CONFIG(RUN_FSP_GOP) && is_devfn_enabled(SA_DEVFN_IGD);
 
 	params->PavpEnable = CONFIG(PAVP);