diff options
| author | Bora Guvendik <bora.guvendik@intel.com> | 2017-04-11 16:05:23 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-04-28 16:32:20 +0200 |
| commit | 43c31096965a05bc5ac0da0a7fb701167e9fb68e (patch) | |
| tree | 700087ca2dce499392d32072bdbdf0f5e2d14efa /src/soc/intel/skylake/bootblock | |
| parent | 33117ec6012fa78765209593e9ab1f4a07812d83 (diff) | |
soc/intel/skylake: Use ITSS common code
This patch uses common ITSS library to setup
itss irq.
Change-Id: Ibe65a92f1604277bec229c67f4375b6636c0972d
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/19244
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/bootblock')
| -rw-r--r-- | src/soc/intel/skylake/bootblock/pch.c | 16 |
1 files changed, 4 insertions, 12 deletions
diff --git a/src/soc/intel/skylake/bootblock/pch.c b/src/soc/intel/skylake/bootblock/pch.c index 12ce3d00a9..01bff0bf33 100644 --- a/src/soc/intel/skylake/bootblock/pch.c +++ b/src/soc/intel/skylake/bootblock/pch.c @@ -18,11 +18,11 @@ #include <chip.h> #include <device/device.h> #include <device/pci_def.h> +#include <intelblocks/itss.h> #include <intelblocks/pcr.h> #include <intelblocks/rtc.h> #include <soc/bootblock.h> #include <soc/iomap.h> -#include <soc/itss.h> #include <soc/lpc.h> #include <soc/p2sb.h> #include <soc/pch.h> @@ -132,8 +132,7 @@ static void pch_interrupt_init(void) { const struct device *dev; const config_t *config; - u8 index = 0; - u8 pch_interrupt_routing[MAX_PXRC_CONFIG]; + uint8_t pch_interrupt_routing[MAX_PXRC_CONFIG]; dev = dev_find_slot(0, PCI_DEVFN(PCH_DEV_SLOT_LPC, 0)); if (!dev || !dev->chip_info) @@ -149,17 +148,10 @@ static void pch_interrupt_init(void) pch_interrupt_routing[6] = config->pirqg_routing; pch_interrupt_routing[7] = config->pirqh_routing; - for (index = 0; index < MAX_PXRC_CONFIG; index++) { - if (pch_interrupt_routing[index] < 16 && - pch_interrupt_routing[index] > 2 && - pch_interrupt_routing[index] != 8 && - pch_interrupt_routing[index] != 13) { - pcr_write8(PID_ITSS, PCR_ITSS_PIRQA_ROUT + index, - pch_interrupt_routing[index]); - } - } + itss_irq_init(pch_interrupt_routing); } + static void soc_config_acpibase(void) { uint32_t reg32; |