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authorSubrata Banik <subrata.banik@intel.com>2017-03-05 12:37:00 +0530
committerMartin Roth <martinroth@google.com>2017-03-28 16:39:28 +0200
commit2ee54db24603f51738cbebd6d80c120f2b4db76d (patch)
tree32670a0d223cde958305c1b2288b0f09a9e5a3b0 /src/soc/intel/skylake/bootblock
parentfc4c7d8320d329d3712cb74e527dca4178f71bf8 (diff)
soc/pci_devs.h: Use consistent naming in soc/pci_devs.h
This patch to make common PCI device name between APL and SKL. Change-Id: I5e4c7502e9678c0a367e9c7a96cf848d5b24f68e Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com> Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/18576 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/skylake/bootblock')
-rw-r--r--src/soc/intel/skylake/bootblock/pch.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/bootblock/pch.c b/src/soc/intel/skylake/bootblock/pch.c
index 62054f14ac..60b22dc8e4 100644
--- a/src/soc/intel/skylake/bootblock/pch.c
+++ b/src/soc/intel/skylake/bootblock/pch.c
@@ -242,7 +242,7 @@ static void soc_config_rtc(void)
static void enable_heci(void)
{
- device_t dev = PCH_DEV_ME;
+ device_t dev = PCH_DEV_CSE;
u8 pcireg;
/* Assign Resources to HECI1 */