diff options
| author | Li Cheng Sooi <li.cheng.sooi@intel.com> | 2017-01-04 09:48:39 +0800 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-03-09 16:38:40 +0100 |
| commit | 6a740539d1005eb14d21da40d7d14ff7250da508 (patch) | |
| tree | ab55bd02818ec769dfa66487b280e9426d8f5c71 /src/soc/intel/skylake/acpi | |
| parent | 86ee4db0d89dfd53a4e153db8e89888a0c762e3e (diff) | |
soc/intel/skylake: Add SKL SOC PCH H GPIO support
Add SKL/KBL PCH-H GPIO settings referring from SKL PCH-H
specifications to support sklrvp11.
Split the gpio_defs.h into headers gpio_pch_h_defs.h and
gpio_soc_defs.h for PCH-H specific and SOC specific GPIO
defs respectively.
Change-Id: I5eaf8d809a1244a56038cbfc29502910eb90f9f2
Signed-off-by: Li Cheng Sooi <li.cheng.sooi@intel.com>
Signed-off-by: Rahul Kumar Gupta <rahul.kumarxx.gupta@intel.com>
Reviewed-on: https://review.coreboot.org/18027
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/acpi')
| -rw-r--r-- | src/soc/intel/skylake/acpi/gpio.asl | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/acpi/gpio.asl b/src/soc/intel/skylake/acpi/gpio.asl index c9116d0264..0c5a793dc3 100644 --- a/src/soc/intel/skylake/acpi/gpio.asl +++ b/src/soc/intel/skylake/acpi/gpio.asl @@ -75,6 +75,26 @@ Device (GPIO) */ Method (GADD, 1, NotSerialized) { +#if IS_ENABLED(CONFIG_SKYLAKE_SOC_PCH_H) + /* GPIO Community 0 */ + If (LAnd (LGreaterEqual (Arg0, GPP_A0), LLessEqual (Arg0, GPP_B23))) + { + Store (PID_GPIOCOM0, Local0) + Subtract (Arg0, GPP_A0, Local1) + } + /* GPIO Community 1 */ + If (LAnd (LGreaterEqual (Arg0, GPP_C0), LLessEqual (Arg0, GPP_H23))) + { + Store (PID_GPIOCOM1, Local0) + Subtract (Arg0, GPP_C0, Local1) + } + /* GPIO Community 03 */ + If (LAnd (LGreaterEqual (Arg0, GPP_I0), LLessEqual (Arg0, GPP_I10))) + { + Store (PID_GPIOCOM3, Local0) + Subtract (Arg0, GPP_I0, Local1) + } +#else /* GPIO Community 0 */ If (LAnd (LGreaterEqual (Arg0, GPP_A0), LLessEqual (Arg0, GPP_B23))) { @@ -93,6 +113,7 @@ Method (GADD, 1, NotSerialized) Store (PID_GPIOCOM3, Local0) Subtract (Arg0, GPP_F0, Local1) } +#endif /* CONFIG_SKYLAKE_SOC_PCH_H */ Store (PCRB (Local0), Local2) Add (Local2, PAD_CFG_DW_OFFSET, Local2) Return (Add (Local2, Multiply (Local1, 8))) |