diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2017-03-08 17:59:40 +0530 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-04-10 20:04:01 +0200 |
| commit | e7ceae79502705a8dc86943e6296fd2cf7735677 (patch) | |
| tree | 932994dc8b8a10f2a2fae49946418bd11c44dfb0 /src/soc/intel/skylake/acpi | |
| parent | d579199f968c88bdbb7e907f6e683d829215eeac (diff) | |
soc/intel/skylake: Use common PCR module
This patch use common PCR library to perform CRRd and CRWr operation
using Port Ids, define inside soc/pcr_ids.h
Change-Id: Id9336883514298e7f93fbc95aef8228202aa6fb9
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/18674
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/acpi')
| -rw-r--r-- | src/soc/intel/skylake/acpi/irqlinks.asl | 4 | ||||
| -rw-r--r-- | src/soc/intel/skylake/acpi/pch.asl | 4 | ||||
| -rw-r--r-- | src/soc/intel/skylake/acpi/pcr.asl | 3 |
3 files changed, 7 insertions, 4 deletions
diff --git a/src/soc/intel/skylake/acpi/irqlinks.asl b/src/soc/intel/skylake/acpi/irqlinks.asl index f698a1e4ed..6a85a74be7 100644 --- a/src/soc/intel/skylake/acpi/irqlinks.asl +++ b/src/soc/intel/skylake/acpi/irqlinks.asl @@ -25,8 +25,8 @@ * https://bugs.acpica.org/show_bug.cgi?id=1201 */ OperationRegion (ITSS, SystemMemory, - Add (R_PCH_PCR_ITSS_PIRQA_ROUT, - Add (PCH_PCR_BASE_ADDRESS, + Add (PCR_ITSS_PIRQA_ROUT, + Add (CONFIG_PCR_BASE_ADDRESS, ShiftLeft (PID_ITSS, PCR_PORTID_SHIFT))), 8) Field (ITSS, ByteAcc, NoLock, Preserve) { diff --git a/src/soc/intel/skylake/acpi/pch.asl b/src/soc/intel/skylake/acpi/pch.asl index 4e7c951af5..78f31a804d 100644 --- a/src/soc/intel/skylake/acpi/pch.asl +++ b/src/soc/intel/skylake/acpi/pch.asl @@ -15,11 +15,13 @@ * GNU General Public License for more details. */ +#include <intelblocks/pcr.h> #include <soc/iomap.h> #include <soc/irq.h> +#include <soc/itss.h> #include <soc/gpio_defs.h> #include <soc/gpe.h> -#include <soc/pcr.h> +#include <soc/pcr_ids.h> /* GPIO Controller */ #include "gpio.asl" diff --git a/src/soc/intel/skylake/acpi/pcr.asl b/src/soc/intel/skylake/acpi/pcr.asl index efe8329407..4b8576b804 100644 --- a/src/soc/intel/skylake/acpi/pcr.asl +++ b/src/soc/intel/skylake/acpi/pcr.asl @@ -20,7 +20,8 @@ */ Method (PCRB, 1, NotSerialized) { - Return (Add (PCH_PCR_BASE_ADDRESS, ShiftLeft (Arg0, PCR_PORTID_SHIFT))) + Return (Add (CONFIG_PCR_BASE_ADDRESS, + ShiftLeft (Arg0, PCR_PORTID_SHIFT))) } /* |