skylake: ACPI: Clean up and fix XHCI ACPI Device

- Remove the old workarounds for XHCI from broadwell
- Add PMC device to expose bits needed for XHCI workarounds
- Implement the new workarounds for XHCI, the first will set
a bit in the XHCI MMIO and the second will send a message
to the PMC if a bit is set indicating the workaround is available.
- Clean up the HS/SS port defines and remove unnecessary
methods to determine the port count since we only support SPT-LP.

BUG=chrome-os-partner:44622,chrome-os-partner:44518
BRANCH=none
TEST=build and boot on glados, verify that D0 and D3 can be
made to work (by disabling unused USB and the misbehaving camera)

Change-Id: I535c9d22308c45a3b9bf7e4045c3d01481acc19c
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: a945f8bc2976d57373be2305c5da40a5691f1e88
Original-Change-Id: I7a57051c0a5c4f5408c2d6ff0aecf660100a1aec
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/295950
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11537
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

1 files changed, 45 insertions, 0 deletions

diff --git a/src/soc/intel/skylake/acpi/pmc.asl b/src/soc/intel/skylake/acpi/pmc.asl
new file mode 100644
index 0000000000..2d826f6883
--- /dev/null
+++ b/src/soc/intel/skylake/acpi/pmc.asl
@@ -0,0 +1,45 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+Device (PMC)
+{
+	Name (_ADR, 0x001f0002)
+	Name (_DDN, "Power Management Controller")
+
+	OperationRegion (PMCP, PCI_Config, 0x00, 0x100)
+	Field (PMCP, AnyAcc, NoLock, Preserve)
+	{
+		Offset (0x48),
+		, 12,
+		PWRM, 20,	/* PWRMBASE */
+	}
+
+	OperationRegion (PMCM, SystemMemory, ShiftLeft (PWRM, 12), 0x3f)
+	Field (PMCM, DWordAcc, NoLock, Preserve)
+	{
+		Offset (0x1c),	/* PCH_PM_STS */
+		, 24,
+		PMFS, 1,	/* PMC_MSG_FULL_STS */
+		Offset (0x20),
+		MPMC, 32,	/* MTPMC */
+		Offset (0x24),	/* PCH_PM_STS2 */
+		, 20,
+		UWAB, 1,	/* USB2 Workaround Available */
+	}
+}