diff options
author | Duncan Laurie <dlaurie@chromium.org> | 2015-08-27 16:48:11 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2015-09-08 11:18:05 +0000 |
commit | 9171f1ab8d9164f909f794a8a308a944ddefc74d (patch) | |
tree | e980c0ecb103d71b3d2f79f4d88a48da18c4ad92 /src/soc/intel/skylake/acpi/pch.asl | |
parent | fbd5367b1c8d5d95063fc03930effb8f54c96831 (diff) |
skylake: ACPI: Remove itss.asl and cleanup irqlinks.asl
Move the itss.asl code that was exporting PIRQ routing
control registers into irqlinks.asl and use the PCR access
methods to find the appropriate address. At the same time
clean up the code in irqlinks.asl to follow formatting rules.
Also now that the GPIO code in itss.asl is unused the file
can be removed.
BUG=chrome-os-partner:44622
BRANCH=none
TEST=emerge-glados coreboot
Change-Id: I1af7d730542fd0e79b9f3db9f0796e7c701c59e6
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 39a96063d01d00ab768db1c723f78b5af9ed6513
Original-Change-Id: Iafa03c276cb276ec8c00c24ed2dba48d0dc9612b
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/295907
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11534
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/acpi/pch.asl')
-rw-r--r-- | src/soc/intel/skylake/acpi/pch.asl | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/acpi/pch.asl b/src/soc/intel/skylake/acpi/pch.asl index 581efa082b..c72a704fc4 100644 --- a/src/soc/intel/skylake/acpi/pch.asl +++ b/src/soc/intel/skylake/acpi/pch.asl @@ -47,7 +47,6 @@ #include "smbus.asl" -#include "itss.asl" /* USB XHCI 0:14.0 */ #include "xhci.asl" |