skylake: ACPI: Remove itss.asl and cleanup irqlinks.asl

Move the itss.asl code that was exporting PIRQ routing
control registers into irqlinks.asl and use the PCR access
methods to find the appropriate address.  At the same time
clean up the code in irqlinks.asl to follow formatting rules.

Also now that the GPIO code in itss.asl is unused the file
can be removed.

BUG=chrome-os-partner:44622
BRANCH=none
TEST=emerge-glados coreboot

Change-Id: I1af7d730542fd0e79b9f3db9f0796e7c701c59e6
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 39a96063d01d00ab768db1c723f78b5af9ed6513
Original-Change-Id: Iafa03c276cb276ec8c00c24ed2dba48d0dc9612b
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/295907
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11534
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

1 files changed, 0 insertions, 96 deletions

diff --git a/src/soc/intel/skylake/acpi/itss.asl b/src/soc/intel/skylake/acpi/itss.asl
deleted file mode 100644
index 8ba9513abd..0000000000
--- a/src/soc/intel/skylake/acpi/itss.asl
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * This file is part of the coreboot project.
- * Copyright (C) 2015 Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* ITSS */
-/* Define the needed ITSS registers used by ASL on Interrupt */
-
-Scope (\_SB)
-{
-	OperationRegion (ITSS, SystemMemory, 0xfdc43100, 0x8)
-	Field (ITSS, ByteAcc, NoLock, Preserve)
-	{
-		PARC, 8,
-		PBRC, 8,
-		PCRC, 8,
-		PDRC, 8,
-		PERC, 8,
-		PFRC, 8,
-		PGRC, 8,
-		PHRC, 8,
-	}
-
-	/*
-	 * Pin# = group_pad# + group# * 24.
-	 * For instance, GPP_A_6 would be pin#6,
-	 * 	GPP_D_23 would be 23+(3*24), pin#95.
-	 */
-	Name (GPPG, Package (0x02)
-	{
-		Package (0x08)
-		{
-			0x18,
-			0x18,
-			0x18,
-			0x18,
-			0x18,
-			0x18,
-			0x08,
-			0x0C
-		},
-
-		Package (0x0A)
-		{
-			0x18,
-			0x18,
-			0x18,
-			0x18,
-			0x0D,
-			0x18,
-			0x18,
-			0x18,
-			0x0B,
-			0x0C
-		}
-	})
-
-	Method (GNMB, 1, Serialized)
-	{
-		Return (And (Arg0, 0xFFFF))
-	}
-
-	Method (GGRP, 1, Serialized)
-	{
-		ShiftRight (And (Arg0, 0x00FF0000), 0x10, Local0)
-		Return (Local0)
-	}
-
-	/* Convert GPIO PAD name to GPIO number */
-	Method (INUM, 1, NotSerialized)
-	{
-		Store (One, Local0)
-		Store (GNMB (Arg0), Local1)
-		Store (GGRP (Arg0), Local2)
-		Store (Zero, Local3)
-
-		While (LLess (Local3, Local2))
-		{
-			Add (DerefOf (Index (DerefOf (Index
-					(GPPG, Local0)), Local3)),
-					Local1, Local1)
-			Increment (Local3)
-		}
-
-		Return (Add (0x18, Mod (Local1, 0x60)))
-	}
-}