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authorDuncan Laurie <dlaurie@chromium.org>2015-11-21 18:40:19 -0800
committerPatrick Georgi <pgeorgi@google.com>2015-12-03 14:22:23 +0100
commit8996084f82119564362b1f9cb28fcbb7d74b3188 (patch)
tree0402f7c67e4b2afc321af841d7925ffcda7d65b5 /src/soc/intel/skylake/acpi/globalnvs.asl
parent21cc96cacd2a2a760524a35298f25dbc59c30072 (diff)
intel/skylake: Add ACPI device for audio controller
Add the audio controller device to ACPI and define the _DSM handler to return the address of the NHLT table, if it has been set in NVS. BUG=chrome-os-partner:47346 BRANCH=none TEST=build and boot on glados and chell Change-Id: I8dc186a8bb79407b69ef32fb224a7c0f85c05bc4 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 6b73fba375f83f175d0b73e5e70a058a6c259e0d Original-Change-Id: Ia9bedbae198e53fe415adc086a44b8b29b7f611d Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/313824 Original-Commit-Ready: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/12597 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake/acpi/globalnvs.asl')
-rw-r--r--src/soc/intel/skylake/acpi/globalnvs.asl2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/acpi/globalnvs.asl b/src/soc/intel/skylake/acpi/globalnvs.asl
index 2018f34e6b..1ea7e53c5f 100644
--- a/src/soc/intel/skylake/acpi/globalnvs.asl
+++ b/src/soc/intel/skylake/acpi/globalnvs.asl
@@ -61,6 +61,8 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
PM1I, 64, // 0x20 - 0x27 - PM1 wake status bit
GPEI, 64, // 0x28 - 0x2f - GPE wake status bit
DPTE, 8, // 0x30 - Enable DPTF
+ NHLA, 64, // 0x31 - NHLT Address
+ NHLL, 32, // 0x39 - NHLT Length
/* ChromeOS specific */
Offset (0x100),