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author | Duncan Laurie <dlaurie@chromium.org> | 2016-11-03 10:33:43 -0700 |
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committer | Martin Roth <martinroth@google.com> | 2016-11-07 20:39:02 +0100 |
commit | 2f3736e7aceb289d51a54679747d65eb09c1e0f1 (patch) | |
tree | dba82ef5525493acdd93e1c2412a67187df0c4fb /src/soc/intel/skylake/acpi/dptf/fan.asl | |
parent | ed4fa099d9583f33130eae97827e63d41d203ff9 (diff) |
soc/intel/{sky,apollo}lake: Wait until GPE is clear when reading
When reading+clearing a GPE for use as an interrupt we need to
re-read the status register and keep setting the clear bit until
it actually reads back clear. Also add a 1ms timeout in case the
status never clears.
This is needed if a device sends a longer interrupt pulse and it
is still asserted when the "ISR" goes to clear the status.
BUG=chrome-os-partner:59299
TEST=test cr50 TPM with 20us pulse to ensure it can successfully
communicate with the TPM and does not get confused due to seeing
interrupts that it should not.
Change-Id: I384f484a1728038d3a355586146deee089b22dd9
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/17212
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc/intel/skylake/acpi/dptf/fan.asl')
0 files changed, 0 insertions, 0 deletions