diff options
author | Naresh G Solanki <Naresh.Solanki@intel.com> | 2015-12-11 18:13:02 +0530 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2016-01-19 17:23:42 +0100 |
commit | a1b3547f0f6e08ad2c83c0224e375217bf187120 (patch) | |
tree | 9c9ae33bd9402131f01563ed3f653eb80a742757 /src/soc/intel/skylake/acpi.c | |
parent | bdab9f787c7d608034bb2b02e68b9812f0450932 (diff) |
intel/skylake: Fix issues found by klockwork
src/soc/intel/skylake/acpi.c
Function cbmem_find may return NULL, check before using its result.
src/soc/intel/skylake/flash_controller.c
Remove dead code: spi_claim_bus is a no-op, always returning 0.
src/soc/intel/skylake/gpio.c
Check for NULL before using pointers.
src/soc/intel/skylake/igd.c
Don't copy 0-termination of signature string.
src/soc/intel/skylake/lpc.c
Don't check unsigned >= 0.
src/soc/intel/skylake/systemagent.c
Explicitly cast result to 64bit.
BRANCH=None
BUG=chrome-os-partner:48542
TEST=Built & booted Kunimitsu board.
Change-Id: I6cbf4f78382383d3c8c3b15f66c5898ab5bf183a
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: d98a8cdd3d095a6943c0e104cd4938639a62bd14
Original-Change-Id: Id2a31402618f4c9f6f53525ebcf6b71fd67428db
Original-Signed-off-by: Naresh G Solanki <Naresh.Solanki@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/317522
Original-Commit-Ready: Naresh Solanki <naresh.solanki@intel.com>
Original-Tested-by: Naresh Solanki <naresh.solanki@intel.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/12991
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/skylake/acpi.c')
-rw-r--r-- | src/soc/intel/skylake/acpi.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c index 4892656b89..c01066f7fb 100644 --- a/src/soc/intel/skylake/acpi.c +++ b/src/soc/intel/skylake/acpi.c @@ -573,11 +573,15 @@ void southcluster_inject_dsdt(device_t device) /* Save wake source information for calculating ACPI _SWS values */ int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0) { - struct chipset_power_state *ps = cbmem_find(CBMEM_ID_POWER_STATE); + struct chipset_power_state *ps; static uint32_t gpe0_sts[GPE0_REG_MAX]; uint32_t pm1_en; int i; + ps = cbmem_find(CBMEM_ID_POWER_STATE); + if (ps == NULL) + return -1; + /* PM1_EN state is lost in Deep S3 so enable basic wake events */ pm1_en = ps->pm1_en | PCIEXPWAK_STS | RTC_STS | PWRBTN_STS | BM_STS; *pm1 = ps->pm1_sts & pm1_en; |