diff options
| author | robbie zhang <robbie.zhang@intel.com> | 2015-10-01 17:21:33 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-10-27 15:15:22 +0100 |
| commit | b45dde0b78cbe646e12316408ac67cdc72ed9a9d (patch) | |
| tree | 5b736a2e5ae7f8f4a28b764f01485e6c6c87867f /src/soc/intel/skylake/acpi.c | |
| parent | 32074149f702d988e07753b5ff5633dbd0e3409c (diff) | |
intel/skylake: Add support for Gfx PEIM (AKA GOP)
This patch implements the igd_opregion using the write_acpi_tables
mechanism to support GOP usage.
BRANCH=none
BUG=chrome-os-partner:44559
TEST=W/o GOP_SUPPORT in config, Built and boot on kunimitsu/glados.
W/ GOP_SUPPORT enabled, build and boot on kunimitsu/glados, but on
glados Dev screen can not be seen (OS display is fine).
CQ-DEPEND=CL:303539
Change-Id: I4cd63dfe0d3f456c5f084e38db976425143f79e7
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4db57463a69c6114b1e2ed4035d378ee3a82783f
Original-Change-Id: I6f3c29c1b608eeaad8f2bf79d17394d49f8e412c
Original-Signed-off-by: robbie zhang <robbie.zhang@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/303387
Original-Commit-Ready: Robbie Zhang <robbie.zhang@intel.com>
Original-Tested-by: Robbie Zhang <robbie.zhang@intel.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/12142
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/skylake/acpi.c')
| -rw-r--r-- | src/soc/intel/skylake/acpi.c | 20 |
1 files changed, 4 insertions, 16 deletions
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c index 471fd17981..4b9440a068 100644 --- a/src/soc/intel/skylake/acpi.c +++ b/src/soc/intel/skylake/acpi.c @@ -21,6 +21,7 @@ #include <arch/acpi.h> #include <arch/acpigen.h> +#include <arch/cpu.h> #include <arch/io.h> #include <arch/ioapic.h> #include <arch/smp/mpspec.h> @@ -29,14 +30,10 @@ #include <console/console.h> #include <cpu/cpu.h> #include <cpu/x86/smm.h> -#include <types.h> -#include <string.h> -#include <arch/cpu.h> #include <cpu/x86/msr.h> #include <cpu/x86/tsc.h> #include <cpu/intel/turbo.h> #include <ec/google/chromeec/ec.h> -#include <vendorcode/google/chromeos/gnvs.h> #include <soc/intel/common/acpi.h> #include <soc/acpi.h> #include <soc/cpu.h> @@ -45,6 +42,9 @@ #include <soc/msr.h> #include <soc/pci_devs.h> #include <soc/pm.h> +#include <string.h> +#include <types.h> +#include <vendorcode/google/chromeos/gnvs.h> /* * List of suported C-states in this processor. @@ -541,8 +541,6 @@ unsigned long acpi_madt_irq_overrides(unsigned long current) return current; } -#define ALIGN_CURRENT current = (ALIGN(current, 16)) - unsigned long southcluster_write_acpi_tables(device_t device, unsigned long current, struct acpi_rsdp *rsdp) @@ -552,16 +550,6 @@ unsigned long southcluster_write_acpi_tables(device_t device, current = acpi_write_hpet(device, current, rsdp); ALIGN_CURRENT; -#if CONFIG_GOP_SUPPORT - igd_opregion_t *opregion; - - printk(BIOS_DEBUG, "ACPI: * IGD OpRegion\n"); - opregion = (igd_opregion_t *)current; - init_igd_opregion(opregion); - current += sizeof(igd_opregion_t); - ALIGN_CURRENT; -#endif - ssdt2 = (acpi_header_t *)current; memset(ssdt2, 0, sizeof(acpi_header_t)); if (ssdt2->length) { |