diff options
| author | Matt Delco <delco@chromium.org> | 2018-07-27 14:17:29 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-08-20 15:53:54 +0000 |
| commit | 9084c3c31bf62bc5c38cf5a1edbd830e407675c6 (patch) | |
| tree | 37c65dd3869bf2a727ffa77e8764b4953490b788 /src/soc/intel/skylake/Makefile.inc | |
| parent | 9557a34abeb8c2101a853f49e20a3671c4551aef (diff) | |
soc/intel/skylake: add CPPC support
ACPI 5.0 defines a method _CPC for "Continuous Performance Control" (CPPC).
Linux has a driver that enables features like speed shift without
consulting ACPI. Other OSes instead rely on this information and need a
_CPC present. Prior to this change performance in Win10 never exceeds
80% and MSR 0x770 is 0, while with this change (and enabling eist) higher
speeds can be achieved and the MSR value is now 1.
Change-Id: Ib7e0ae13f4b664b51e42f963e53c71f8832be062
Signed-off-by: Matt Delco <delco@chromium.org>
Reviewed-on: https://review.coreboot.org/27673
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/Makefile.inc')
| -rw-r--r-- | src/soc/intel/skylake/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index 1060c2a11b..74f86d1439 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -2,6 +2,7 @@ ifeq ($(CONFIG_SOC_INTEL_SKYLAKE),y) subdirs-y += nhlt subdirs-y += romstage +subdirs-y += ../../../cpu/intel/common subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/x86/lapic |