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authorKyösti Mälkki <kyosti.malkki@gmail.com>2016-12-02 14:38:13 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2016-12-07 13:04:58 +0100
commit27198ac2e3efaf45177909d35d1dab5f82c114fd (patch)
tree669a39290ac111ec46724c302f9cbc2924860a27 /src/soc/intel/sch
parente25b5ef39fd10e48e87e0c4770a721a786e36a36 (diff)
MMCONF_SUPPORT: Drop redundant logging
Resource is actually stored even before read_resources, but that's where we currently log this resource. For Intel, use PCI config register offset as the resource index, while AMD side uses MSR address. Change-Id: I6eeef1883c5d1ee5bbcebd1731c0e356af3fd781 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17696 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/sch')
-rw-r--r--src/soc/intel/sch/northbridge.c15
1 files changed, 1 insertions, 14 deletions
diff --git a/src/soc/intel/sch/northbridge.c b/src/soc/intel/sch/northbridge.c
index 2d3949052c..0bc840d750 100644
--- a/src/soc/intel/sch/northbridge.c
+++ b/src/soc/intel/sch/northbridge.c
@@ -201,19 +201,6 @@ static void mc_read_resources(device_t dev)
}
}
-static void mc_set_resources(device_t dev)
-{
- struct resource *resource;
-
- /* Report the PCIe BAR. */
- resource = find_resource(dev, 0xcf);
- if (resource)
- report_resource_stored(dev, resource, "<mmconfig>");
-
- /* And call the normal set_resources. */
- pci_dev_set_resources(dev);
-}
-
static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device)
{
if (!vendor || !device) {
@@ -231,7 +218,7 @@ static struct pci_operations intel_pci_ops = {
static struct device_operations mc_ops = {
.read_resources = mc_read_resources,
- .set_resources = mc_set_resources,
+ .set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.acpi_fill_ssdt_generator = generate_cpu_entries,
.scan_bus = 0,