aboutsummaryrefslogtreecommitdiff
path: root/src/soc/intel/sch/reset.c
diff options
context:
space:
mode:
authorStefan Reinauer <stefan.reinauer@coreboot.org>2016-05-03 15:53:33 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2016-05-17 21:38:17 +0200
commit4bab6e79b078c76d0a42883c4b4c9c68615d5a1e (patch)
tree2c7dda58587f464fa1baee712c95bb48c924ff76 /src/soc/intel/sch/reset.c
parent083da160af4a0e3a76506af59477f105d78b9683 (diff)
intel/sch: Merge northbridge and southbridge in src/soc
Change-Id: I6ea9b9d2353c0d767c837e6d629b45f23b306f6e Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://review.coreboot.org/14599 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
Diffstat (limited to 'src/soc/intel/sch/reset.c')
-rw-r--r--src/soc/intel/sch/reset.c29
1 files changed, 29 insertions, 0 deletions
diff --git a/src/soc/intel/sch/reset.c b/src/soc/intel/sch/reset.c
new file mode 100644
index 0000000000..2574565f75
--- /dev/null
+++ b/src/soc/intel/sch/reset.c
@@ -0,0 +1,29 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2008-2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/io.h>
+#include <reset.h>
+
+void soft_reset(void)
+{
+ outb(0x04, 0xcf9);
+}
+
+void hard_reset(void)
+{
+ outb(0x02, 0xcf9);
+ outb(0x06, 0xcf9);
+}