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authorJulius Werner <jwerner@chromium.org>2019-03-05 16:53:33 -0800
committerPatrick Georgi <pgeorgi@google.com>2019-03-08 08:33:24 +0000
commitcd49cce7b70e80b4acc49b56bb2bb94370b4d867 (patch)
tree8e89136e2da7cf54453ba8c112eda94415b56242 /src/soc/intel/quark
parentb3a8cc54dbaf833c590a56f912209a5632b71f49 (diff)
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
This patch is a raw application of find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g' Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/quark')
-rw-r--r--src/soc/intel/quark/bootblock/bootblock.c12
-rw-r--r--src/soc/intel/quark/bootblock/esram_init.S4
-rw-r--r--src/soc/intel/quark/i2c.c20
-rw-r--r--src/soc/intel/quark/romstage/car.c4
-rw-r--r--src/soc/intel/quark/romstage/car_stage_entry.S6
-rw-r--r--src/soc/intel/quark/romstage/fsp2_0.c6
-rw-r--r--src/soc/intel/quark/sd.c2
-rw-r--r--src/soc/intel/quark/storage_test.c16
8 files changed, 35 insertions, 35 deletions
diff --git a/src/soc/intel/quark/bootblock/bootblock.c b/src/soc/intel/quark/bootblock/bootblock.c
index d3aa900214..ff5b9b2a52 100644
--- a/src/soc/intel/quark/bootblock/bootblock.c
+++ b/src/soc/intel/quark/bootblock/bootblock.c
@@ -79,7 +79,7 @@ static const struct reg_script mtrr_init[] = {
asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
{
- if (IS_ENABLED(CONFIG_ENABLE_DEBUG_LED_BOOTBLOCK_ENTRY))
+ if (CONFIG(ENABLE_DEBUG_LED_BOOTBLOCK_ENTRY))
light_sd_led();
bootblock_main_with_timestamp(base_timestamp, NULL, 0);
@@ -87,7 +87,7 @@ asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
void bootblock_soc_early_init(void)
{
- if (IS_ENABLED(CONFIG_ENABLE_DEBUG_LED_SOC_EARLY_INIT_ENTRY))
+ if (CONFIG(ENABLE_DEBUG_LED_SOC_EARLY_INIT_ENTRY))
light_sd_led();
/* Initialize the MTRRs */
@@ -98,18 +98,18 @@ void bootblock_soc_early_init(void)
reg_script_run_on_dev(LPC_BDF, legacy_gpio_init);
/* Enable the HSUART */
- if (IS_ENABLED(CONFIG_ENABLE_BUILTIN_HSUART0))
+ if (CONFIG(ENABLE_BUILTIN_HSUART0))
reg_script_run_on_dev(HSUART0_BDF, hsuart_init);
- if (IS_ENABLED(CONFIG_ENABLE_BUILTIN_HSUART1))
+ if (CONFIG(ENABLE_BUILTIN_HSUART1))
reg_script_run_on_dev(HSUART1_BDF, hsuart_init);
- if (IS_ENABLED(CONFIG_ENABLE_DEBUG_LED_SOC_EARLY_INIT_EXIT))
+ if (CONFIG(ENABLE_DEBUG_LED_SOC_EARLY_INIT_EXIT))
light_sd_led();
}
void bootblock_soc_init(void)
{
- if (IS_ENABLED(CONFIG_ENABLE_DEBUG_LED_SOC_INIT_ENTRY))
+ if (CONFIG(ENABLE_DEBUG_LED_SOC_INIT_ENTRY))
light_sd_led();
display_mtrrs();
diff --git a/src/soc/intel/quark/bootblock/esram_init.S b/src/soc/intel/quark/bootblock/esram_init.S
index 67d223817d..13a4d63d3c 100644
--- a/src/soc/intel/quark/bootblock/esram_init.S
+++ b/src/soc/intel/quark/bootblock/esram_init.S
@@ -459,7 +459,7 @@ stackless_PCIConfig_Read:
esram_init_done:
-#if IS_ENABLED(CONFIG_ENABLE_DEBUG_LED)
+#if CONFIG(ENABLE_DEBUG_LED)
sd_led:
/* Set the SDIO controller's base address */
@@ -491,7 +491,7 @@ L43:
jmp stackless_PCIConfig_Read
L44:
-#if IS_ENABLED(CONFIG_ENABLE_DEBUG_LED_ESRAM)
+#if CONFIG(ENABLE_DEBUG_LED_ESRAM)
jmp light_sd_led
#endif /* CONFIG_ENABLE_DEBUG_LED_ESRAM */
#endif /* CONFIG_ENABLE_DEBUG_LED */
diff --git a/src/soc/intel/quark/i2c.c b/src/soc/intel/quark/i2c.c
index a3bfb3bcbb..595c818593 100644
--- a/src/soc/intel/quark/i2c.c
+++ b/src/soc/intel/quark/i2c.c
@@ -67,7 +67,7 @@ static int platform_i2c_write(uint32_t restart, uint8_t *tx_buffer, int length,
if (status & (IC_INTR_RX_OVER | IC_INTR_RX_UNDER
| IC_INTR_TX_ABRT | IC_INTR_TX_OVER)) {
i2c_disable(regs);
- if (IS_ENABLED(CONFIG_I2C_DEBUG))
+ if (CONFIG(I2C_DEBUG))
printk(BIOS_ERR,
"0x%08x: ic_raw_intr_stat, I2C write error!\n",
status);
@@ -76,7 +76,7 @@ static int platform_i2c_write(uint32_t restart, uint8_t *tx_buffer, int length,
/* Check for timeout */
if (stopwatch_expired(timeout)) {
- if (IS_ENABLED(CONFIG_I2C_DEBUG))
+ if (CONFIG(I2C_DEBUG))
printk(BIOS_ERR,
"0x%08x: ic_raw_intr_stat, I2C write timeout!\n",
status);
@@ -142,7 +142,7 @@ static int platform_i2c_read(uint32_t restart, uint8_t *rx_buffer, int length,
if (status & (IC_INTR_RX_OVER | IC_INTR_RX_UNDER
| IC_INTR_TX_ABRT | IC_INTR_TX_OVER)) {
i2c_disable(regs);
- if (IS_ENABLED(CONFIG_I2C_DEBUG))
+ if (CONFIG(I2C_DEBUG))
printk(BIOS_ERR,
"0x%08x: ic_raw_intr_stat, I2C read error!\n",
status);
@@ -151,7 +151,7 @@ static int platform_i2c_read(uint32_t restart, uint8_t *rx_buffer, int length,
/* Check for timeout */
if (stopwatch_expired(timeout)) {
- if (IS_ENABLED(CONFIG_I2C_DEBUG))
+ if (CONFIG(I2C_DEBUG))
printk(BIOS_ERR,
"0x%08x: ic_raw_intr_stat, I2C read timeout!\n",
status);
@@ -204,7 +204,7 @@ int platform_i2c_transfer(unsigned int bus, struct i2c_msg *segment,
uint8_t *tx_buffer;
int tx_bytes;
- if (IS_ENABLED(CONFIG_I2C_DEBUG)) {
+ if (CONFIG(I2C_DEBUG)) {
for (index = 0; index < seg_count;) {
if (index == 0)
printk(BIOS_ERR, "I2C Start\n");
@@ -283,7 +283,7 @@ int platform_i2c_transfer(unsigned int bus, struct i2c_msg *segment,
/* Return any detected error */
if (data_bytes < 0) {
- if (IS_ENABLED(CONFIG_I2C_DEBUG))
+ if (CONFIG(I2C_DEBUG))
printk(BIOS_ERR,
"I2C segment[%d] failed\n",
index);
@@ -299,7 +299,7 @@ int platform_i2c_transfer(unsigned int bus, struct i2c_msg *segment,
/* Return any detected error */
if (data_bytes < 0) {
- if (IS_ENABLED(CONFIG_I2C_DEBUG))
+ if (CONFIG(I2C_DEBUG))
printk(BIOS_ERR,
"I2C segment[%d] failed\n",
index);
@@ -330,7 +330,7 @@ int platform_i2c_transfer(unsigned int bus, struct i2c_msg *segment,
if (status & (IC_INTR_RX_OVER | IC_INTR_RX_UNDER
| IC_INTR_TX_ABRT | IC_INTR_TX_OVER)) {
i2c_disable(regs);
- if (IS_ENABLED(CONFIG_I2C_DEBUG)) {
+ if (CONFIG(I2C_DEBUG)) {
printk(BIOS_ERR,
"0x%08x: ic_raw_intr_stat, I2C read error!\n",
status);
@@ -343,7 +343,7 @@ int platform_i2c_transfer(unsigned int bus, struct i2c_msg *segment,
/* Check for timeout */
if (stopwatch_expired(&timeout)) {
- if (IS_ENABLED(CONFIG_I2C_DEBUG)) {
+ if (CONFIG(I2C_DEBUG)) {
printk(BIOS_ERR,
"0x%08x: ic_raw_intr_stat, I2C read timeout!\n",
status);
@@ -362,7 +362,7 @@ int platform_i2c_transfer(unsigned int bus, struct i2c_msg *segment,
regs->ic_tar = 0;
/* Return the number of bytes transferred */
- if (IS_ENABLED(CONFIG_I2C_DEBUG))
+ if (CONFIG(I2C_DEBUG))
printk(BIOS_ERR, "0x%08x: bytes transferred\n",
bytes_transferred);
return bytes_transferred;
diff --git a/src/soc/intel/quark/romstage/car.c b/src/soc/intel/quark/romstage/car.c
index 9f052a31ec..8ad87d2f43 100644
--- a/src/soc/intel/quark/romstage/car.c
+++ b/src/soc/intel/quark/romstage/car.c
@@ -54,9 +54,9 @@ void car_soc_pre_console_init(void)
reg_script_run_on_dev(LPC_BDF, legacy_gpio_init);
/* Enable the HSUART */
- if (IS_ENABLED(CONFIG_ENABLE_BUILTIN_HSUART0))
+ if (CONFIG(ENABLE_BUILTIN_HSUART0))
reg_script_run_on_dev(HSUART0_BDF, hsuart_init);
- if (IS_ENABLED(CONFIG_ENABLE_BUILTIN_HSUART1))
+ if (CONFIG(ENABLE_BUILTIN_HSUART1))
reg_script_run_on_dev(HSUART1_BDF, hsuart_init);
}
diff --git a/src/soc/intel/quark/romstage/car_stage_entry.S b/src/soc/intel/quark/romstage/car_stage_entry.S
index b8207117fa..d51587143b 100644
--- a/src/soc/intel/quark/romstage/car_stage_entry.S
+++ b/src/soc/intel/quark/romstage/car_stage_entry.S
@@ -29,7 +29,7 @@ car_stage_entry:
/* Enter the C code */
call car_stage_c_entry
-#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP1_1)
+#if CONFIG(PLATFORM_USES_FSP1_1)
#if !ENV_VERSTAGE
#include "src/drivers/intel/fsp1_1/after_raminit.S"
#endif
@@ -57,7 +57,7 @@ car_stage_entry:
.Lhlt:
xchg %al, %ah
mov $POST_DELAY, %dh
-#if IS_ENABLED(CONFIG_POST_IO)
+#if CONFIG(POST_IO)
outb %al, $CONFIG_POST_IO_PORT
#else
post_code(POST_DEAD_CODE)
@@ -67,7 +67,7 @@ car_stage_entry:
.flash_delay:
outb %al, $0xED
loop .flash_delay
-#if IS_ENABLED(CONFIG_ENABLE_DEBUG_LED)
+#if CONFIG(ENABLE_DEBUG_LED)
movl $SD_HOST_CTRL, %ebx
movb 0(%ebx), %dl
xorb $1, %dl
diff --git a/src/soc/intel/quark/romstage/fsp2_0.c b/src/soc/intel/quark/romstage/fsp2_0.c
index c237da5270..31e130a398 100644
--- a/src/soc/intel/quark/romstage/fsp2_0.c
+++ b/src/soc/intel/quark/romstage/fsp2_0.c
@@ -36,7 +36,7 @@ asmlinkage void *car_stage_c_entry(void)
post_code(0x20);
console_init();
- if (IS_ENABLED(CONFIG_STORAGE_TEST)) {
+ if (CONFIG(STORAGE_TEST)) {
uint32_t bar;
pci_devfn_t dev;
uint32_t previous_bar;
@@ -132,7 +132,7 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *fspm_upd, uint32_t version)
aupd->BootMode = FSP_BOOT_WITH_FULL_CONFIGURATION;
/* Display the ESRAM layout */
- if (IS_ENABLED(CONFIG_DISPLAY_ESRAM_LAYOUT)) {
+ if (CONFIG(DISPLAY_ESRAM_LAYOUT)) {
printk(BIOS_SPEW, "\nESRAM Layout:\n\n");
printk(BIOS_SPEW,
"+-------------------+ 0x80080000 - ESRAM end\n");
@@ -175,7 +175,7 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *fspm_upd, uint32_t version)
upd->RmuLength = rmu_data_len;
upd->SerialPortWriteChar = !!console_log_level(BIOS_SPEW)
? (uintptr_t)fsp_write_line : 0;
- upd->SmmTsegSize = IS_ENABLED(CONFIG_HAVE_SMI_HANDLER) ?
+ upd->SmmTsegSize = CONFIG(HAVE_SMI_HANDLER) ?
config->SmmTsegSize : 0;
upd->SocRdOdtVal = config->SocRdOdtVal;
upd->SocWrRonVal = config->SocWrRonVal;
diff --git a/src/soc/intel/quark/sd.c b/src/soc/intel/quark/sd.c
index c10ac4fbf1..08db791ffd 100644
--- a/src/soc/intel/quark/sd.c
+++ b/src/soc/intel/quark/sd.c
@@ -23,7 +23,7 @@
static void init(struct device *dev)
{
/* Run the SD test */
- if (IS_ENABLED(CONFIG_STORAGE_TEST)) {
+ if (CONFIG(STORAGE_TEST)) {
uint32_t bar;
uint32_t previous_bar;
uint16_t previous_command;
diff --git a/src/soc/intel/quark/storage_test.c b/src/soc/intel/quark/storage_test.c
index 36819a4700..79901f29ff 100644
--- a/src/soc/intel/quark/storage_test.c
+++ b/src/soc/intel/quark/storage_test.c
@@ -27,7 +27,7 @@
#include <soc/storage_test.h>
#include <string.h>
-#if IS_ENABLED(CONFIG_STORAGE_LOG)
+#if CONFIG(STORAGE_LOG)
struct log_entry log[LOG_ENTRIES] CAR_GLOBAL;
uint8_t log_index CAR_GLOBAL;
int log_full CAR_GLOBAL;
@@ -37,7 +37,7 @@ long log_start_time CAR_GLOBAL;
static uint8_t drivers_storage[256] CAR_GLOBAL;
#define STORAGE_DEBUG BIOS_DEBUG
-#define LOG_DEBUG (IS_ENABLED(CONFIG_STORAGE_LOG) ? STORAGE_DEBUG : BIOS_NEVER)
+#define LOG_DEBUG (CONFIG(STORAGE_LOG) ? STORAGE_DEBUG : BIOS_NEVER)
#ifdef __SIMPLE_DEVICE__
uint32_t storage_test_init(pci_devfn_t dev, uint32_t *previous_bar,
@@ -88,7 +88,7 @@ void storage_test_complete(struct device *dev, uint32_t previous_bar,
static void display_log(void)
{
/* Determine the array bounds */
- if (IS_ENABLED(CONFIG_STORAGE_LOG)) {
+ if (CONFIG(STORAGE_LOG)) {
long delta;
uint8_t end;
uint8_t index;
@@ -121,7 +121,7 @@ static void display_log(void)
void sdhc_log_command(struct mmc_command *cmd)
{
- if (IS_ENABLED(CONFIG_STORAGE_LOG)) {
+ if (CONFIG(STORAGE_LOG)) {
timer_monotonic_get(&log[log_index].time);
log[log_index].cmd = *cmd;
log[log_index].cmd_issued = 0;
@@ -133,7 +133,7 @@ void sdhc_log_command(struct mmc_command *cmd)
void sdhc_log_command_issued(void)
{
- if (IS_ENABLED(CONFIG_STORAGE_LOG)) {
+ if (CONFIG(STORAGE_LOG)) {
log[log_index].cmd_issued = 1;
}
}
@@ -142,7 +142,7 @@ void sdhc_log_response(uint32_t entries, uint32_t *response)
{
unsigned int entry;
- if (IS_ENABLED(CONFIG_STORAGE_LOG)) {
+ if (CONFIG(STORAGE_LOG)) {
log[log_index].response_entries = entries;
for (entry = 0; entry < entries; entry++)
log[log_index].response[entry] = response[entry];
@@ -151,7 +151,7 @@ void sdhc_log_response(uint32_t entries, uint32_t *response)
void sdhc_log_ret(int ret)
{
- if (IS_ENABLED(CONFIG_STORAGE_LOG)) {
+ if (CONFIG(STORAGE_LOG)) {
log[log_index].ret = ret;
if (++log_index == 0)
log_full = 1;
@@ -189,7 +189,7 @@ void storage_test(uint32_t bar, int full_initialization)
storage_display_setup(media);
} else {
/* Initialize the log */
- if (IS_ENABLED(CONFIG_STORAGE_LOG)) {
+ if (CONFIG(STORAGE_LOG)) {
log_index = 0;
log_full = 0;
}