summaryrefslogtreecommitdiff
path: root/src/soc/intel/quark
diff options
context:
space:
mode:
authorLee Leahy <leroy.p.leahy@intel.com>2016-05-22 16:24:36 -0700
committerLeroy P Leahy <leroy.p.leahy@intel.com>2016-05-31 21:59:47 +0200
commit6b24dfce742d92f399a943d72cbae26b5d6f90aa (patch)
treec7c831d9fc23fd993daf87a08bd3c5c801542424 /src/soc/intel/quark
parent7f4b0539808ceea3854ad56cdc6f1cf69595279b (diff)
soc/intel/quark: Fix reg_script display
Remove extra ": " following reigster type. TEST=Build and run on Galileo Gen2 Change-Id: I57dd40a540d7b5371a6c45174f47a311b83a2aab Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/14948 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/quark')
-rw-r--r--src/soc/intel/quark/reg_access.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/src/soc/intel/quark/reg_access.c b/src/soc/intel/quark/reg_access.c
index 30cc7db18a..1dd0d3c7db 100644
--- a/src/soc/intel/quark/reg_access.c
+++ b/src/soc/intel/quark/reg_access.c
@@ -216,21 +216,21 @@ static uint64_t reg_read(struct reg_script_context *ctx)
return 0;
case GPE0_REGS:
- ctx->display_prefix = "GPE0: ";
+ ctx->display_prefix = "GPE0";
value = reg_gpe0_read(step->reg);
break;
case GPIO_REGS:
- ctx->display_prefix = "GPIO: ";
+ ctx->display_prefix = "GPIO";
value = reg_gpio_read(step->reg);
break;
case LEG_GPIO_REGS:
- ctx->display_prefix = "Legacy GPIO: ";
+ ctx->display_prefix = "Legacy GPIO";
value = reg_legacy_gpio_read(step->reg);
case PCIE_AFE_REGS:
- ctx->display_prefix = "PCIe AFE: ";
+ ctx->display_prefix = "PCIe AFE";
value = reg_pcie_afe_read(step->reg);
break;
@@ -265,28 +265,28 @@ static void reg_write(struct reg_script_context *ctx)
return;
case GPE0_REGS:
- ctx->display_prefix = "GPE0: ";
+ ctx->display_prefix = "GPE0";
reg_gpe0_write(step->reg, (uint32_t)step->value);
break;
case GPIO_REGS:
- ctx->display_prefix = "GPIO: ";
+ ctx->display_prefix = "GPIO";
reg_gpio_write(step->reg, (uint32_t)step->value);
break;
case LEG_GPIO_REGS:
- ctx->display_prefix = "Legacy GPIO: ";
+ ctx->display_prefix = "Legacy GPIO";
reg_legacy_gpio_write(step->reg, (uint32_t)step->value);
break;
case PCIE_AFE_REGS:
- ctx->display_prefix = "PCIe AFE: ";
+ ctx->display_prefix = "PCIe AFE";
reg_pcie_afe_write(step->reg, (uint32_t)step->value);
break;
case PCIE_RESET:
if (ctx->display_features) {
- ctx->display_prefix = "PCIe reset: ";
+ ctx->display_prefix = "PCIe reset";
ctx->display_features &= ~REG_SCRIPT_DISPLAY_REGISTER;
}
mainboard_gpio_pcie_reset(step->value);