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authorLee Leahy <leroy.p.leahy@intel.com>2016-02-17 08:47:58 -0800
committerLeroy P Leahy <leroy.p.leahy@intel.com>2016-02-18 20:36:53 +0100
commit654fd0703ad8f785faa49b22bf59036c6eb47f6c (patch)
tree62cff7cb30f59c36577014110c1e24b3876a69bb /src/soc/intel/quark/uart.c
parent535333dd54b0ef3fd29f26dc204db03065b4fedb (diff)
soc/intel/quark: Enable HSUART1
Enable HSUART1 for debug serial output. Specify the fixed resources in the UART driver. This keeps debug serial output flowing during the rest of the device initialization. Testing on Galileo: * Edit the src/mainboard/intel/galileo/Makefile.inc file * Add "select ADD_FSP_PDAT_FILE" * Add "select ADD_FSP_RAW_BIN" * Add "select ADD_RMU_FILE" * Place the FSP.bin file in the location specified by CONFIG_FSP_FILE * Place the pdat.bin files in the location specified by CONFIG_FSP_PDAT_FILE * Place the rmu.bin file in the location specified by CONFIG_RMU_FILE * Testing successful if: * Debug serial output stays enabled after BS_DEV_RESOURCES state Change-Id: Ica02e5fece156b21d4a3889284ca467d55c7880d Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/13730 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/quark/uart.c')
-rw-r--r--src/soc/intel/quark/uart.c42
1 files changed, 27 insertions, 15 deletions
diff --git a/src/soc/intel/quark/uart.c b/src/soc/intel/quark/uart.c
index 2b5b398143..b97fceafee 100644
--- a/src/soc/intel/quark/uart.c
+++ b/src/soc/intel/quark/uart.c
@@ -15,26 +15,38 @@
* GNU General Public License for more details.
*/
-// Use simple device model for this file even in ramstage
-#define __SIMPLE_DEVICE__
-
#include <console/uart.h>
#include <device/pci.h>
#include <device/pci_def.h>
-#include <rules.h>
-#include <soc/pci_devs.h>
+#include <device/pci_ids.h>
-unsigned int uart_platform_refclk(void)
+static void uart_read_resources(device_t dev)
{
- return 44236800;
-}
+ struct resource *res;
-uintptr_t uart_platform_base(int idx)
-{
- /* HSUART controller #1 (B0:D20:F5). */
- device_t dev = PCI_DEV(0, HSUART1_DEV, HSUART1_FUNC);
+ /* Read the resources */
+ pci_dev_read_resources(dev);
- /* UART base address at BAR0(offset 0x10). */
- return (unsigned int) (pci_read_config32(dev,
- PCI_BASE_ADDRESS_0) & ~0xfff);
+ /* Set the debug port configuration */
+ res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ res->base = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
+ res->size = 0x100;
+ res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
}
+
+static struct device_operations device_ops = {
+ .read_resources = &uart_read_resources,
+ .set_resources = &pci_dev_set_resources,
+ .enable_resources = &pci_dev_enable_resources,
+};
+
+static const unsigned short uart_ids[] = {
+ 0x0936, /* HSUART0, HSUART1 */
+ 0
+};
+
+static const struct pci_driver uart_driver __pci_driver = {
+ .ops = &device_ops,
+ .vendor = PCI_VENDOR_ID_INTEL,
+ .devices = uart_ids,
+};