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authorLee Leahy <leroy.p.leahy@intel.com>2017-04-01 20:33:58 -0700
committerLee Leahy <leroy.p.leahy@intel.com>2017-05-08 19:13:35 +0200
commit16bc9bab2ab3b248f44bdf721ec83cdc21bcc32e (patch)
tree4d52e7ae44b49d4f63b21c74a255c47389e6bfeb /src/soc/intel/quark/sd.c
parent52f29743b153e89ca38db5d7a207c676c4c70207 (diff)
soc/intel/quark: Add SD/MMC test support
The SD/MMC test support consists of: * Add Kconfig value to enable the SD/MMC test support. * Add Kconfig value to enable the logging support. * Add SD/MMC controller init code and read block 0 from each partition. * Add logging code to snapshot the transactions with the SD/MMC device. * Add eMMC driver for ramstage to call test code. * Add romstage code to call test code. * Add bootblock code to call test code. TEST=Build and run on Galileo Gen2 Change-Id: I72785f0dcd466c05c1385cef166731219b583551 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/19211 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/quark/sd.c')
-rw-r--r--src/soc/intel/quark/sd.c50
1 files changed, 50 insertions, 0 deletions
diff --git a/src/soc/intel/quark/sd.c b/src/soc/intel/quark/sd.c
new file mode 100644
index 0000000000..7b9600193c
--- /dev/null
+++ b/src/soc/intel/quark/sd.c
@@ -0,0 +1,50 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2017 Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/io.h>
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <device/sdhci.h>
+#include <device/storage.h>
+#include <soc/storage_test.h>
+
+static void init(struct device *dev)
+{
+ /* Run the SD test */
+ if (IS_ENABLED(CONFIG_STORAGE_TEST)) {
+ uint32_t bar;
+ uint32_t previous_bar;
+ uint16_t previous_command;
+
+ bar = storage_test_init(dev, &previous_bar, &previous_command);
+ storage_test(bar, 0);
+ storage_test_complete(dev, previous_bar, previous_command);
+ }
+}
+
+static const struct device_operations device_ops = {
+ .read_resources = pci_dev_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .enable_resources = pci_dev_enable_resources,
+ .init = init,
+};
+
+static const struct pci_driver pmc __pci_driver = {
+ .ops = &device_ops,
+ .vendor = PCI_VENDOR_ID_INTEL,
+ .device = 0x08A7,
+};