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authorLee Leahy <leroy.p.leahy@intel.com>2016-05-30 14:35:15 -0700
committerLeroy P Leahy <leroy.p.leahy@intel.com>2016-05-31 22:10:56 +0200
commitac78db3a53a7653a73409936455d68c754291e9d (patch)
tree74b89328d2678996dbdee610ad3c1fa9c148de3a /src/soc/intel/quark/romstage/romstage.c
parentfd91dee42001cd055d5a51c13750c8e1abc0e7e1 (diff)
soc/intel/quark: Move UART init into romstage.c
Move UART initialization into romstage.c and eliminate uart.c. TEST=Build and run on Galileo Gen2 Change-Id: I5f2c9b4c566008000c2201c422a0bba63da64487 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/15009 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/quark/romstage/romstage.c')
-rw-r--r--src/soc/intel/quark/romstage/romstage.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/src/soc/intel/quark/romstage/romstage.c b/src/soc/intel/quark/romstage/romstage.c
index c86c2eae3d..5be022a8d6 100644
--- a/src/soc/intel/quark/romstage/romstage.c
+++ b/src/soc/intel/quark/romstage/romstage.c
@@ -58,11 +58,17 @@ static const struct reg_script i2c_gpio_controller_init[] = {
REG_SCRIPT_END
};
+static const struct reg_script hsuart_init[] = {
+ /* Enable the HSUART */
+ REG_PCI_WRITE32(PCI_BASE_ADDRESS_0, UART_BASE_ADDRESS),
+ REG_PCI_OR8(PCI_COMMAND, PCI_COMMAND_MEMORY),
+ REG_SCRIPT_END
+};
+
void car_soc_pre_console_init(void)
{
if (IS_ENABLED(CONFIG_ENABLE_BUILTIN_HSUART1))
- set_base_address_and_enable_uart(0, HSUART1_DEV, HSUART1_FUNC,
- UART_BASE_ADDRESS);
+ reg_script_run_on_dev(HSUART1_BDF, hsuart_init);
}
void car_soc_post_console_init(void)